Declaring/Clearing the dLOM Defect

This post briefly describes the dLOM (Loss of Multi-Frame) defect for OTN applications. This post describes how an OTN STE should declare and clear the dLOM defect condition.

How an OTN STE should declare and clear the dLOM (Loss of Multi-Frame) Defect Condition.

The purpose of this post is to describe how an OTN STE (Section Terminating Equipment) will declare and clear the dLOM (Loss of Multi-Frame) Defect Condition.

Suppose you’re analyzing this topic from an ITU-T G.798 Atomic Function standpoint. In that case, I will tell you that the two atomic functions that are responsible for declaring and clearing the dLOM defect condition are:

The OTSi/OTUk_A_Sk Function, and
The OTSiG/OTUk_A_Sk Function.

Each of these atomic functions includes the dLOM Detection circuit.

A Note about Terminology:

Throughout this blog post, I will refer to the entity containing the dLOM Detection circuit (and declares/clears the dLOM defect condition ) as the Sink STE.

I’m using this terminology because it is technically correct, and it is much simpler to use that word than to use: OTSi/OTUk_A_Sk or OTSiG/OTUk_A_Sk functions. However, I will use atomic function-related terms below in Table 1 (at the end of this post).

A Brief Review of the OTUk Frame Structure

In the OTUk Post, I stated that the OTUk frame consists of a single multi-frame alignment signal (MFAS) byte.

I show a drawing of the OTUk Frame Structure, with the MFAS-field highlighted below in Figure 1.

Figure 1, Drawing of the OTUk Frame Structure, with the MFAS-Field Highlighted

In the OTUk blog post, we mentioned that the Source STE Terminal would generate and transmit OTUk traffic in the form of back-to-back multi-frames. Each of these multi-frames consists of 256 consecutive OTUk frames.

The MFAS Byte Increments with each Frame

The S0urce STE Terminal will designate one of these OTUk frames as the first frame within a multi-frame by setting the MFAS byte (within that particular frame) to 0x00. When the Source STE generates and transmits the next OTUk frame, it will set the MFAS byte (within that OTUk frame) to 0x01.

The Source STE will continue incrementing the MFAS byte within each outbound OTUk frame until it has transmitted the 256th frame within this multi-frame. And it has set the MFAS byte to 0xFF (or 255 in decimal format).

At this point, the Source STE has completed its transmission of a given 256-frame OTUk multi-frame, and it will start to transmit the very next multi-frame.

The Source STE will show that it is transmitting the next 256-frame multi-frame by setting the MFAS byte to 0x00 (once again) and then incrementing the value that it writes into each MFAS byte (within each outbound OTUk frame) until it reaches 0xFF (255).

This process repeats indefinitely.

Now that we have re-acquainted ourselves with the MFAS byte, we can discuss how a Sink STE will declare and clear the dLOM (Loss of Multi-frame) defect condition.

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A Basic Requirement before We can Clear the dLOM Defect Condition

Before I can begin to discuss the dLOM-Related State Machines (and the actual mechanics of declaring and clearing the dLOM defect). I need to be very clear about one thing.

The Sink STE can’t clear the dLOM defect condition unless it has first cleared the dLOF defect condition.

Additionally, anytime the Sink STE declares the dLOF defect condition, it loses MFAS synchronization.

There are several reasons for this:

The Sink STE needs to find the FAS-field first

The MFAS byte-field resides in Row 1, Byte 7 (within the OTUk frame). It is adjacent to the FAS field. Therefore, once the Sink STE finds the FAS field, it can quickly locate the MFAS byte.

The FAS field is FAR more accessible for the Sink STE to find than the MFAS byte.

There are two reasons for this.

The FAS field consists of a defined/fixed pattern. In other words, the FAS fields never change in value (except for the 3rd OA2 byte – for OTL4.4 and OTL4.10 applications ONLY).

The Sink STE can locate the FAS field by only looking for these fixed patterns. On the other hand, the MFAS byte value changes with every OTUk frame.

Additionally, we NEVER scramble the FAS field. However, we do scramble the MFAS byte.

I show a drawing of an OTUk frame below that identifies the portions of the OTUk frame that the Remote Source STE has scrambled before transmitting this OTUk frame to the Near-end Sink STE.

Figure 2, Drawing of an OTUk Frame – Showing the portions of the OTUk Frame that we scrambled.

Finally, the MFAS byte-field was scrambled by a Frame-Synchronous Scrambler (at the remote Source STE)

Therefore, you will need to descramble the MFAS byte (along with the rest of the OTUk frame) with a Frame-Synchronous Descrambler.

This means that the Sink STE needs proper synchronization with the incoming OTUk frames (e.g., clearing the dLOF defect) before we can even use this Frame-Synchronous Descrambler.

Now that I’ve made that point, I will discuss how the Sink STE declares and clears the dLOM defect.

We will first discuss dLOM-Related State Machines.

The dLOM-Related State Machines

Once again, whenever the Sink STE first powers up and receives a stream of OTUk data, it will first need to acquire FAS-frame synchronization with this incoming data stream, as described in the dLOF – Loss of Frame Defect blog post.

After the Sink STE has cleared the dLOF defect condition (and can now reliably locate the FAS field within each incoming OTUk frame), it can proceed to find the MFAS byte.

Figure 1 (above) shows that the MFAS byte resides in row 1, byte-column 7 (immediately following the FAS field) within the OTUk frame.

Whenever the Sink STE has acquired FAS-frame synchronization with the incoming OTUk frame (and cleared the dLOF defect condition), it will continuously operate simultaneously per two sets of state machines.

The OTUk-MFAS OOM/IM Low-Level State Machine and
The OTUk-dLOM Framing Alignment/Maintenance State Machine

These two state machines are hierarchical. In other words, one of these state machines operates at the low level (e.g., the OTUk-MFAS OOM/IM Low-Level State Machine), and the other state machine operates at a higher layer (on top of the low-level state machine).

I show the relationship between these two-state machines below in Figure 3.

Figure 3, Illustration of the relationship between the two dLOM-related State Machines

We will discuss these two state machines below.

The OTUk-MFAS OOM/IM Low-Level State Machine

We will discuss the OTUk-MFAS OOM/IM Low-Level State Machine first, and then we will discuss the OTUk-dLOM Framing Alignment/Maintenance State Machine later.

I show a drawing of the OTUk-MFAS OOM/IM Low-Level State Machine Diagram below in Figure 4.

Figure 4, Drawing of the OTUk-MFAS OOM/IM Low-Level State Machine Diagram

Figure 4 shows that the OTUk-MFAS OOM/IM Low-Level State Machine contains the following two states.

The LL-OOM (Low-Level – Out of Multi-frame) state and
The LL-IM (Low-Level – In Multi-frame) state

When the System Operator powers up the Sink STE circuitry, feeds an OTUk data stream and clears the dLOF defect, it will continually operate in one of these states.

The Sink STE will (on occasion) need to transition from one state to another.

We will discuss these two states below.

The LL-OOM State

Whenever the Sink STE first clears the dLOF defect condition, it will (initially) be operating in the LL-OOM (Low Level – Out of Multi-Frame) state.

At this point, the Sink STE either has not located the MFAS byte or is not yet in sync with the incrementing MFAS byte value within the incoming OTUk data stream.

While the Sink STE is operating in this state, it will begin to evaluate bytes (that it “believes” to be the MFAS byte-field) within each incoming OTUk frame. More specifically, the Sink STE will locate a given Candidate MFAS byte and read in its value.

The value of this MFAS byte will be between 0x00 and 0xFF (255) inclusively. The Sink STE will note this value, and it will then perform the following computation.

Next_Expected_MFAS_Value = MOD(Candidate_MFAS_Value + 1, 256);

In other words, the Sink STE will take the byte value (of the Candidate MFAS byte that it has read in) and (internally) increment this value by 1.

I hope you understand why we run this incremented Candidate_MFAS_Value through a Modulus Equation with a divisor of 256.

The Sink STE will assign this newly incremented value to the variable Next_Expected_MFAS_Value. We will use this “Next _Expected_MFAS_Value” to evaluate the next incoming OTUk frame.

The Sink STE will then wait through 16,320-byte periods (or one OTUk frame period) and then read in another Candidate MFAS value (from this next OTUk frame), and it will compare that byte value with the “Next_Expected_MFAS_Value” that it has computed.

If the Sink STE determines that this new “Candidate MFAS Value” does not match the “Next_Expected_MFAS_Value,” then it will go back and parse through the incoming OTUk data-stream and look for another byte-field (within row 1, column 7 of the incoming OTUk frame).

The Sink STE will continue to operate in the LL-OOM state.

On the other hand, if the Sink STE does (indeed) determine that the expression “Candidate MFAS value ” matches that of the “Next_Expected_MFAS_Value,” then it will transition into the LL-IM (Low-Level – In-Multi-Frame) state.

The LL-IM State

Once the Sink STE enters the LL-IM state, then it will continue to check for the presence of the correct (properly incrementing byte values within the MFAS byte) at OTUk frame intervals.

If the Sink STE can consistently locate these MFAS bytes at each OTUk frame interval (with the correct and properly incrementing values), it will remain in the LL-IM state.

However, if the Sink STE lost synchronization with the MFAS field (of each incoming OTUk frame), it could not locate the MFAS field for five (5) consecutive OTUk frame periods, then the Sink STE will transition back into the LL-OOM state.

NOTE: The OTUk-MFAS OOM/IM Low-Level State Machine algorithm is tolerant of bit errors. In other words, the presence of occasional bit-errors or a burst of bit-errors is not enough to cause the Sink STE to transition from the LL-IM back to the LL-OOM state.

Now that we have discussed the OTUk-MFAS OOM/IM Low-Level State Machine, let’s move on and describe the OTUk-dLOM Framing Alignment/Maintenance State Machine.

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The OTUk-dLOM Framing Alignment/Maintenance State Machine

I show a drawing of the OTUk-dLOM Framing Alignment/Maintenance State Machine Diagram below in Figure 5.

Figure 5, Drawing of the OTUk-dLOM Framing Alignment/Maintenance State Machine Diagram

Hence, Figure 5 shows that the OTUk-dLOM Framing Alignment/Maintenance State Machine diagram consists of four states.

dLOM/LL-OOM State
dLOM/LL-IM State
In-Multiframe/LL-IM State
In-Multiframe/LL-OOM State

The OTUk-dLOM Framing Alignment/Maintenance State Machine rides on top of the OTUk-MFAS OOM/IM State Machine. Therefore, we can think of the OTUk-dLOM Framing Alignment/Maintenance State Machine as an extension of this Low-Level State Machine.

Hence, to illustrate that point, I have redrawn the OTUk-dLOM Framing Alignment/Maintenance State Machine diagram (that I show in Figure 5) to show the conditions that cause us to transition from one state to the next within the OTUk-MFAS OOF/IF State Machine. I show this redrawn figure below in Figure 6.

Figure 6, Illustration of the OTUk-dLOM Framing-Alignment/Maintenance State Machine Diagram (with OTUk-MFAS OOF/IF State Machine state change information shown).

The Sink STE will transition through each of the four states (within the OTUk-dLOM Framing Alignment/Maintenance State Machine) as it also transitions through the two states within the OTUk-MFAS OOM/IM Low-Level State Machine.

Whenever the System Operator powers up the Sink STE and starts receiving an OTUk data stream (once it has cleared the dLOF defect), it will continually operate in one of these four states. On occasion, the Sink STE will transition from one state to another. As it does this, it will declare or clear the dLOM defect, as shown in Figures 5 and 6.

We will now walk through the OTUk-dLOM Framing Alignment/Maintenace State Machine.

The dLOM/LL-OOM State

When the System Operator first powers up the Sink STE and is just starting to receive an OTUk data stream, the Sink STE will first clear the dLOF defect condition. Afterward, it will operate in the dLOM/LL-OOM State, as shown below in Figure 7.

Figure 7, Illustration of the OTUk-dLOM Framing Alignment/Maintenance State Machine Diagram with the dLOM/LL-OOM State Highlighted.

In the expression dLOM/LL-OOM, the reader should already know where the LL-OOM portion (of this state’s name) originates.

When we were discussing the OTUk-MFAS OOF/IF Low-Level State Machine (up above), we stated that whenever we first power up the Sink STE and it is just starting to receive an OTUk data-stream (and has cleared the dLOF defect condition), it will be operating in the LL-OOM state.

What does it mean to be in the dLOM/LL-OOM State?

The dLOM portion (of the expression dLOM/LL-OOM) means that the Sink STE is currently declaring the dLOM defect condition while operating in this particular state.

In summary, whenever the Sink STE is operating in the dLOM/LL-OOM state (within the OTUk-dLOM Framing Alignment/Maintenance State Machine), then we can state the following as fact:

The Sink STE is operating in the LL-OOM State (within the Lower-Level state machine, as we discussed earlier) and
The Sink STE is also declaring the dLOM defect condition (as the name of this state suggests).

Whenever the Sink STE operates in this state, it has NOT located the MFAS byte-fields within the incoming OTUk data stream. As far as the Sink STE is concerned, it only receives some stream of back-to-back OTUk frames. It cannot make sense of anything else within this data stream.

While the Sink STE operates in this state, it will parse through the incoming OTUk data stream and look for the MFAS byte-field.

Whenever the Sink STE has received (what it believes to be the MFAS byte because it immediately follows the FAS field), it will read in the contents of this “Candidate MFAS field.”

Next, the Sink STE will take that “Candidate MFAS field,” and it will insert that value into the following equation and compute a value for Next_Expected_MFAS_Value:

Next_Expected_MFAS_Value = MOD(Candidate_MFAS_Field + 1, 256)

Afterward, the Sink STE will wait an entire OTUk frame period (e.g., 16,320 bytes) later, and it will read out the contents of (what it believes is the MFAS byte). We will call this new byte value the “New_Candidate_MFAS_Value.”

Next, the Sink STE will compare that “New_Candidate_MFAS_Value” with its locally computed “Next_Expected_MFAS_Value,” by testing the following equation:

Next_Expected_MFAS_Value == New_Candidate_MFAS_Value;

If the New_Candidate_MFAS_Value fails the Test

If the Sink STE determines that the New_Candidate_MFAS_Value does NOT match the Next_Expected_MFAS_Value, then it has NOT located the MFAS byte. In this case, the Sink STE will continue to parse through (and search) the incoming OTUk data stream for another candidate MFAS byte.

It will also remain in the dLOM/LL-OOM state.

If the New_Candidate_MFAS_Value passes the Test

On the other hand, if the New_Candidate_MFAS_Value does (indeed) match the value for the Next_Expected_MFAS_Value, then the Sink STE will conclude that it has located the MFAS byte value. In this case, the Sink STE will transition from the LL-OOM state to the LL-IM state within the OTUk-MFAS OOM/IM State Machine.

As the Sink STE makes this transition within the low-level state machine, it will also transition from the dLOM/LL-OOM to the dLOM/LL-IM state within the OTUk-dLOM Framing Alignment/Maintenance State Machine.

The dLOM/LL-IM State

I illustrate the OTUk-dLOM Frame Alignment/Maintenance State-Machine diagram with the dLOM/LL-IM State highlighted below in Figure 8.

Figure 8, Illustration of the OTUk-dLOM Frame Alignment/Maintenance State-Machine Diagram, with the dLOM/LL-IM State highlighted

Whenever the Sink STE has transitioned into the dLOM/LL-IM State, we can state that the Sink STE has located (what appears to be) the MFAS-byte-field within the incoming OTUk data stream.

NOTES:

We refer to this state as the dLOM/LL-IM state because the Sink STE is still declaring the dLOM defect condition (just as it was while operating in the dLOM/LL-OOM state). However, the “LL-IM” portion of the state’s name (e.g., dLOM/LL-IM) reflects the fact that the Sink STE has transitioned into the LL-IM (Low-Level In-Multi-frame) state within the lower-level state machine.
I realize that calling this state the dLOM (Loss of Multi-Frame)/LL-IM (In-Multi-Frame) state is a bit of an oxymoron. In this case, the Sink STE is in-multi-frame because it has located the MFAS byte-field. However, it is still declaring the dLOM defect condition.

While the Sink STE is still operating in the dLOM/LL-IM state, it will perform the task of continuing to confirm whether or not it has located the MFAS byte (within the incoming OTUk data stream).

Whenever the Sink STE is operating in this state, two things can happen from here.

It can eventually transition (or advance) into the “In-Multi-Frame/LL-IM” state, or
It can transition (or regress) back into the dLOM/LL-OOM state.

We will discuss each of these possible events below.

Advancing to the In-Multi-Frame/LL-IM State

ITU-T G.798 requires that the Sink STE remain in the LL-IM state (at the low level) for at least 3ms before it can transition into the next state.

If the Sink STE remains in the dLOM/LL-IM state for at least 3ms (and continues to locate the MFAS byte accurately), then it will do all of the following:

It will transition into the “In-Multi-Frame/LL-IM” state within the OTUk-dLOM Frame Alignment/Maintenance State Machine, and
It will clear the dLOM defect condition (e.g., dLOM ⇒ 0).

I will discuss the In-Multi-Frame/LL-IM State later in this blog post.

Regressing to the dLOM/LL-OOM State

On the other hand, if the Sink STE (while in the dLOM/LL-IM state) were to lose synchronization with the MFAS byte, such that it cannot locate the MFAS byte for at least five (5) consecutive OTUk frame periods, then the Sink STE will transition back into the dLOM/LL-OOM state.

This means that the Sink STE will transition from the LL-IM state back into the LL-OOM state (at the Lower-Level State Machine).

Additionally, the Sink STE will continue to declare the dLOM defect condition.

The In-Multi-Frame/LL-IM State

Once the Sink STE has reached the In-Multi-frame/LL-IM state, we can say that it operates in the NORMAL (or intended) state. We expect the Sink STE to spend most of its operating lifetime in this state.

I show a drawing of the OTUk-dLOM Framing Alignment/Maintenance State Machine Diagram, with the In-Multi-frame/LL-IM State highlighted below in Figure 9.

Figure 9, Illustration of the OTUk-dLOM Framing Alignment/Maintenance State Machine Diagram, with the In-Multi-Frame/LL-IM State highlighted.

Whenever the Sink STE operates in the In-Multi-frame/LL-IM state, it can locate the MFAS byte-fields within each incoming OTUk frame.

What Does Clearing the dLOM Defect Mean?

Clearing the dLOM defect also means that the Sink STE should be ready to evaluate other aspects of this incoming OTUk data stream (which requires multi-frame alignment). This includes extracting the following types of data from the incoming OTUk/ODUk data stream.

Within the OTUk Overhead
- SM-TTI (Trail Trace Identification) Messages
Within the ODUk Overhead
- PM-TTI Messages
- APS/PCC Messages
Within the OPUk Overhead
- PSI Messages

The MFAS byte is also critical for those applications where we are mapping and multiplexing lower-speed ODUj tributary signals into higher-speed ODUk server signals (where k > j).

Of course, the Sink STE is telling the whole world this fact by clearing the dLOM defect condition.

Whenever the Sink STE operates in the In-Multi-frame/LL-IM state, it is pretty tolerant of the occurrences of bit errors. In other words, if the Sink STE were to receive an OTUk frame, such that there was (for example) a single-bit error or even a burst of errors that affects an MFAS byte, the Sink STE would remain in the “In-Multi-frame/LL-IM” state.

On the other hand, if the Sink STE were to lose synchronization with the incoming OTUk data stream, such that it cannot locate valid MFAS bytes for five consecutive OTUk frames, then the Sink STE will transition from the LL-IM state into the LL-OOM state (within the Lower-Level State Machine).

Consequently, the Sink STE will transition from the In-Multi-frame/LL-IM state into the In-Multi-frame/LL-OOM state.

We discuss the In-Multi-frame/LL-OOM State below.

The In-Multi-frame/LL-OOM State

I show a drawing of the OTUk-dLOM Frame Alignment/Maintenance State Machine diagram with the In-Multi-frame/LL-OOM State highlighted below in Figure 10.

Figure 10, Drawing of the OTUk-dLOM Multi Frame Alignment/Maintenance State Machine diagram, with the In-Multiframe/LL-OOM State highlighted.

If the Sink STE transitions into the In-Multi-frame/LL-OOM state, this means the following things.

The Sink STE has transitioned from the LL-IM state into the LL-OOM state within the OTUk-MFAS OOM/IM Low-Level State Machine.
The Sink STE is still NOT declaring the dLOM (Loss of Multi-frame) defect condition (e.g., dLOM = 0).

NOTE: We refer to this state as the “In-Multi-frame/LL-OOM” state because the Sink STE is still NOT declaring the dLOM defect condition (just as it was NOT while operating in the In-Multi-frame/LL-IM state).

However, the LL-OOM portion of the state’s name (e.g., In-Multi-frame/LL-OOM) reflects that the Sink STE has transitioned into the LL-OOM state (within the Low-Level State Machine).

Only one of two possible things will happen whenever the Sink STE enters the In-Multi-frame/LL-OOM state.

The Sink STE will eventually re-acquire synchronization with the incoming MFAS bytes (within the OTUk data-stream), and it will advance back into the In-Multi-frame/LL-IM state or
The Sink STE does not re-acquire synchronization with the incoming MFAS bytes (within the OTUk data-stream), and it eventually regresses into the dLOM/LL-OOM state.

We will briefly discuss these two possible events below.

Advancing Back into the In-Multi-Frame/LL-IM State

If the Sink STE can locate and re-acquire the MFAS bytes (within the incoming OTUk data-stream), it will transition back into the In-Multi-Frame/LL-IM State. In this case, the Sink STE will continue to clear the dLOM defect condition (dLOM = 0).

Regressing to the dLOM/LL-OOM State

ITU-T G.798 requires that the Sink STE reside in the In-Multi-Frame/LL-OOM state for 3ms before it can transition into the dLOM/LL-OOM state and declare the dLOM defect condition.

This means that if the Sink STE cannot locate the MFAS-field (for 3ms after transitioning into the In-Multi-Frame/LL-OOM state), it will transition into the dLOM/LL-OOM state.

Whenever the Sink STE transitions into the dLOM/LL-OOM state, it will declare the dLOM defect condition (dLOM = 1).

In Summary

ITU-T G.798 requires that the Sink STE be able to locate the MFAS byte and consistently remain in the LL-IM state for at least 3ms before it can clear the dLOM defect condition (e.g., dLOM ⇒ CLEARED).

Further, ITU-T G.798 also requires that the Sink STE NOT be able to locate the MFAS byte and remain in this condition (e.g., the LL-OOM state) for at least 3ms before it can declare the dLOM defect condition (e.g., dLOM ⇒ DECLARED).

ITU-T G.798 imposes these 3ms persistency requirements (for declaring and clearing the dLOM defect) to prevent intermittent transitions between the LL-OOM and LL-IM states from causing sporadic changes (or chattering) in the dLOM state.

Table 1 summarizes the dLOM Defect Condition and how its State affects an OTN STE’s Operation.

Table 1, Summary of the dLOM Defect Condition and How its State affects an OTN STE’s Operation

Item	Description
Meaning of the dLOM Defect Condition	The Sink STE (or OTSi/OTUk_A_Sk or OTSiG/OTUk_A_Sk atomic function) will declare the dLOM defect, if it has cleared the dAIS and the dLOF defect conditions, but it is not able to reliably locate the MFAS bytes and OTUk Multi-frame boundaries, within the incoming OTUk data-stream. In other words, the Sink STE will declare the dLOM defect if it is able to find the FAS fields (within each incoming OTUk frame) but it still not able to reliably locate the MFAS bytes and align itself with each incoming 256-frame OTUk multi-frame.
Requirements to declare dLOM	The Sink STE (or OTSi/OTUk_A_Sk or OTSiG/OTUk_A_Sk atomic function) will declare the dLOM defect if it loses synchronization with the incoming MFAS bytes (and their increment value) for at least 3ms.
Requirements to clear dLOM	The Sink STE (or OTSi/OTUk_A_Sk or OTSiG/OTUk_A_Sk atomic function) will clear the dLOM defect if it is able to maintain synchronization with the incoming (and incrementing) MFAS byte-fields (within the OTUk data-stream) for at least 3ms.
Any defects that will suppress the dLOM defect?	Yes, the dAIS (OTUk-AIS) and dLOF defects. Or if upstream circuitry is declaring the Trail Signal Fail defect condition. If the Sink STE (or OTSi/OTUk_A_Sk or OTSiG/OTUk_A_Sk atomic function) declares any of these defect conditions, then it cannot declare the dLOM defect.
Impact of declaring the dLOF defect on other defect conditions within the Sink STE	The Sink STE (or OTSi/OTUk_A_Sk or OTSiG/OTUk_A_Sk atomic function) should not declare any of the following defects, whenever it is also declaring the dLOM defect. - dTIM, and - dDEG
Impact of declaring the dLOM defect to Performance Monitoring.	None

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Declaring/Clearing the dLOF Defect

This post briefly describes the dLOF (Loss of Frame) Defect Condition. It describes when an OTN STE should declare and clear the dLOF defect condition.

How an OTN STE should declare and clear the dLOF (Loss of Frame) Defect Condition

The purpose of this post is to describe how an OTN STE (Section Terminating Equipment) will declare and clear the dLOF (Loss of Frame) Defect Condition.

The OTSi/OTUk_A_Sk Function, and
The OTSiG/OTUk_A_Sk Function.

Each of these atomic functions includes the dLOF Detection circuit. However, if you look closely at the OTSiG/OTUk_A_Sk function post, you will see that I do show that this particular dLOF Detection circuit is optional.

A Note About Terminology:

Throughout this blog post, I will refer to the entity containing the dLOF Detection circuit (and declares/clears the dLOF defect condition) as the Sink STE.

I’m using this terminology because it is technically correct, and it is much simpler to use that word than to use the words: OTSi/OTUk_A_Sk or OTSiG/OTUk_A_Sk functions. However, I will use atomic function-related terms below in Table 1 (at the bottom of this post).

A Brief Review of the OTUk Frame Structure

In the OTUk Post, we mentioned that the OTUk frame consists of six framing alignment signal (FAS) bytes.

I present an illustration of the OTUk Frame Structure, with the FAS field highlighted below in Figure 1.

Figure 1, Illustration of the OTUk Frame Structure, with the FAS-Field Highlighted

Figure 1 shows that the FAS field consists of 3-byte fields (which I’ve labeled OA1) and another set of 3-byte fields, which I’ve labeled OA2.

The OA1 byte fields are each set to the fixed value of 0xF6. Similarly, the OA2 byte fields are each set to the specified value of 0x28.

Hence, this 6-byte FAS field will (for each OTUk frame) always have the fixed pattern of 0xF6, 0xF6, 0xF6, 0x28, 0x28, 0x28.

Since each OTUk frame is a 4080-byte column x 4-row structure, each frame contains 16,320 bytes. Therefore, we know that a Sink STE (or OTSi/OTUk_A_Sk function) will always receive this fixed pattern of six bytes (e.g., the FAS field) every 16,320 byte-periods.

Now that we are armed with this information, we can discuss how the Sink STE will declare and clear the dLOF defect.

The dLOF-Related State Machines

Anytime the Sink STE is powered-up and receives a stream of OTUk data, it will continually operate per two sets of state machines simultaneously.

The OTUk-FAS OOF/IF Low-Level State Machine and
The OTUk-dLOF Framing Alignment/Maintenance State Machine

These two state machines are hierarchical. In other words, one of these state machines operates at the low level (e.g., the OTUk-FAS OOF/IF Low-Level State Machine), and the other state machine (e.g., the OTUk-dLOF Framing Alignment/Maintenance State Machine) operates at a higher level (on top of the lower-level state machine).

I show the relationship between these two state machines below in Figure 2.

Figure 2, Illustration of the relationship between the two dLOF-Related State Machines

We will discuss each of these two state machines below.

The OTUk-FAS OOF/IF Low-Level State Machine

We will discuss the OTUk-FAS OOF/IF Low-Level State Machine first, and then we will discuss the OTUk-dLOF Framing Alignment/Maintenance State Machine later.

I present an illustration of the OTUk-FAS OOF/IF Low-Level State Machine Diagram below in Figure 3.

Figure 3, Illustration of the OTUk-FAS OOF/IF Low-Level State Machine Diagram

Figure 3 shows that the OTUk-FAS OOF/IF Low-Level State Machine consists of the following two states:

The LL-OOF (Low-Level Out-of-Frame) State and
The LL-IF (Low-Level In-Frame) State

From the moment the System Operator powers up the Sink STE circuitry and feeds an OTUk data stream to it (from the remote Source STE), it will continuously operate in one of these two states.

The Sink STE will (on occasion) need to transition from one state to another.

We will discuss each of these two states below.

The LL-OOF State

Whenever the System Operator first powers up a Sink STE and starts receiving an OTUk data stream (from the remote Source STE), it will operate in the LL-OOF state.

The Sink STE has not located the FAS-bytes (and the OTUk frame boundaries). Therefore, the Sink STE cannot “make sense” of this data.

While the Sink STE operates in this state, it will begin to parse through the incoming OTUk data stream. It will search for the occurrence of the FAS pattern within this data stream.

Earlier, I mentioned that this FAS-field is a 6-byte field that consists of the following fixed pattern: 0xF6, 0xF6, 0xF6, 0x28, 0x28, 0x28.

ITU-T G.798’s Requirement for Searching for the FAS field

ITU-T G.798 states that the Sink STE when operating the LL-OOF state, MUST look for a 4-byte subset of this 6-byte FAS pattern. Therefore, this 4-byte FAS pattern could be any one of the following patterns.

0xF6, 0xF6, 0xF6, 0x28
0xF6, 0xF6, 0x28, 0x28
or 0xF6, ox28, ox28, ox28

Whenever the Sink STE has detected a set of four consecutive bytes that resembles a four-byte subset of the FAS field (as we’ve listed above), then the Sink STE will then wait an entire OTUk frame period (e.g., 16,320 bytes later) and it will check and see if that same FAS pattern is present then again.

If the Sink STE does not find the FAS pattern (one OTUk frame period later), then it will continue to parse through the incoming OTUk data stream and search for a 4-byte subset of the FAS pattern.

The Sink STE will also continue to operate in the LL-OOF state.

On the other hand, if the Sink STE does (indeed) find the FAS pattern (one OTUk frame period later), then the Sink STE will transition into the LL-IF state.

We will discuss the LL-IF State below.

The LL-IF State

Once the Sink STE enters the LL-IF state, it will continue to check for the presence of the FAS field at OTUk-frame intervals.

NOTE: Once the Sink STE enters the LL-IF state, ITU-T G.798 only requires it to check for a 3-byte subset of the FAS-field. Specifically, the standard states that the Sink STE must continue to check for the presence of the OA1, OA2, and OA2 (e.g., 0xF6, 0x28, 0x28) patterns at each OTUk frame interval.

As long as the Sink STE can consistently locate these FAS bytes at each OTUk frame interval, it will remain in the LL-IF state.

However, suppose the Sink STE were to lose synchronization with the FAS-field (of each incoming OTUk frame) such that it could not locate the FAS-field for five (5) consecutive OTUk frame periods. In that case, the Sink STE function will transition back into the LL-OOF state.

NOTE: The OTUk-FAS OOF/IF Low-Level State Machine algorithm tolerates bit errors. In other words, the presence of occasional bit errors is not enough to cause the Sink STE to transition from the LL-IF state back into the LL-OOF state.

Now that we have discussed the OTUk-FAS OOF/IF Low-Level State Machine, let’s move on and discuss the OTUk-dLOF Framing Alignment/Maintenance State Machine.

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The OTUk-dLOF Framing Alignment/Maintenance State Machine

Figure 4 illustrates the OTUk-dLOF Framing Alignment/Maintenance State-Machine Diagram.

Figure 4, Illustration of the OTUk-dLOF Framing-Alignment/Maintenance State Machine Diagram (with State Machine Transition Criteria shown)

Hence, Figure 4 shows that the OTUk-dLOF Framing Alignment/Maintenance State Machine Diagram consists of the following four states.

dLOF/LL-OOF State
dLOF/LL-IF State
In-Frame/LL-IF State
In-Frame/LL-OOF State

The OTUk-dLOF Framing Alignment/Maintenance State Machine “rides” on top of the OTUk-FAS OOF/IF State Machine. Therefore, we can think of the OTUk-dLOF Framing Alignment/Maintenance State Machine as an extension of this Low-Level State Machine.

Hence, to illustrate that point, I have redrawn the OTUk-dLOF Framing Alignment/Maintenance State Machine diagram (that I show in Figure 4) to also show the underlying state changes within the OTUk-FAS OOF/IF State Machine. I show this redrawn figure below in Figure 5.

Figure 5, Illustration of the OTUk-dLOF Framing-Alignment/Maintenance State Machine Diagram (with OTUk-FAS OOF/IF State Machine state change information shown).

The Sink STE will transition through each of the four states (within the OTUk-dLOF Framing Alignment/Maintenance State Machine) as it also transitions between the two states within the OTUk-FAS OOF/IF Low-Level State Machine.

Whenever the System-Operator powers up the Sink STE and starts receiving an OTUk data stream, it will continually operate in one of these four states. On occasion, the Sink STE will transition from one state to another. As it does, it will either declare or clear the dLOF defect, as shown in Figures 4 and 5.

We will now “walk” through the OTUk-dLOF Framing Alignment/Maintenance State Machine.

The dLOF/LL-OOF State

Whenever the System Operator first powers up the Sink STE and is just starting to receive an OTUk data stream, it will initially operate in the dLOF/LL-OOF State, as I show below in Figure 6.

Figure 6, Illustration of the OTUk-dLOF Framing Alignment/Maintenance State Machine Diagram with the dLOF/LL-OOF State Highlighted.

In the expression dLOF/LL-OOF, the reader should already know where the LL-OOF portion (of this state’s name) originates.

When we were discussing the OTUk-FAS OOF/IF Low-Level State Machine (up above), we stated that whenever we power up the Sink STE, it is just starting to receive an OTUk data stream. It will be operating in the LL-OOF state.

What does it mean to be in the dLOF/LL-OOF State?

The dLOF portion (of the expression dLOF/LL-OOF) means that the Sink STE is currently declaring the dLOF defect condition while operating in this particular state.

In summary, whenever the Sink STE is operating in the dLOF/LL-OOF state (within the OTUk-dLOF Framing Alignment/Maintenance State Machine), then we can state the following as fact:

The Sink STE is operating in the LL-OOF state (within the lower-level state machine, as we discussed earlier), and
The Sink STE also declares the dLOF defect condition (as the name of this state suggests).

Whenever the Sink STE operates in this state, it has NOT located the FAS fields nor the boundaries of any OTUk frames within the incoming OTUk data stream. As far as the Sink STE is concerned, it receives nonsensical data.

While the Sink STE is operating in this state, it will parse through the incoming OTUk data stream and look for the four-byte subset of the FAS field (as we discussed earlier).

Whenever the Sink STE has detected a set of four consecutive bytes that resembles a four-byte subset of the FAS field, the Sink STE will then wait an entire OTUk frame period (e.g., 16,320 bytes) later, and it will check and see if that same FAS pattern is again present, within the OTUk data-stream.

If the Sink STE Fails to Find the FAS field

If the Sink STE does not find the FAS pattern (one OTUk frame period later), it will continue to parse through (and search) the incoming OTUk data stream for that 4-byte subset of the FAS pattern.

It will also remain in the dLOF/LL-OOF state.

If the Sink STE Successfully Locates the FAS field

On the other hand, if the Sink STE does (indeed) find the FAS pattern (one OTUk frame period, later), then the Sink STE will transition from the LL-OOF state to the LL-IF state within the OTUk-FAS OOF/IF State Machine.

As the Sink STE makes this transition within the low-level state machine, it will also transition from the dLOF/LL-OOF to the dLOF/LL-IF state within the OTUk-dLOF Framing Alignment/Maintenance State Machine.

The dLOF/LL-IF State

I illustrate the OTUk-dLOF Frame Alignment/Maintenance State-Machine diagram with the dLOF/LL-IF State highlighted below in Figure 7.

Figure 7, Illustration of the OTUk-dLOF Frame Alignment/Maintenance State-Machine Diagram, with the dLOF/LL-IF State highlighted.

Whenever the Sink STE has transitioned into the dLOF/LL-IF state, we can state that the Sink STE has located (what appears to be) the FAS fields within the incoming OTUk data stream.

NOTES:

We refer to this state as the dLOF/LL-IF state because the Sink STE is still declaring the dLOF defect condition (just as it was while operating in the dLOF/LL-OOF state). However, the “LL-IF” portion of the state’s name (e.g., dLOF/LL-IF) reflects the fact that the Sink STE has transitioned into the LL-IF (Low-Level In-Frame) state within the lower-level state machine.
I realize that calling this state the dLOF (Loss-of-Frame)/LL-IF (In-Frame) state is a bit of an oxymoron. In this case, the Sink STE is in-frame because it has located the FAS fields. However, it is still declaring the dLOF defect condition.

While the Sink STE is operating in the dLOF/LL-IF state, it will perform the task of continuing to confirm whether or not it has located the FAS bytes (within the incoming OTUk data stream).

Two possible things can happen from here whenever the Sink STE is operating in this state.

It can eventually transition (or advance) into the “In-Frame/LL-IF” state, or
It can transition (or regress) back into the dLOF/LL-OOF state.

We will discuss each of these possible events below.

Advancing to the In-Frame/LL-IF State

ITU-T G.798 requires that the Sink STE remain in the LL-IF state (at the low level) for at least 3ms before it can transition into the next state.

If the Sink STE remains in the dLOF/LL-IF state for at least 3ms (and continues to locate the FAS bytes accurately), then it will do all of the following:

It will transition into the “In-Frame/LL-IF” state within the OTUk-dLOF Frame Alignment/Maintenance State Machine, and
It will clear the dLOF defect condition (e;g., dLOF ⇒ 0).

I will discuss the In-Frame/LL-IF State later in this blog post.

Regressing to the dLOF/LL-OOF State

On the other hand, if the Sink STE (while operating in the dLOF/LL-IF state) were to lose synchronization with the FAS byte-fields, it can no longer locate the FAS bytes for at least five (5) consecutive OTUk frame periods. The Sink STE will transition back into the dLOF/LL-OOF state.

This means that the Sink STE will transition from the LL-IF state back into the LL-OOF state (within the Lower-Level State Machine).

Additionally, the Sink STE will continue to declare the dLOF defect condition.

The In-Frame/LL-IF State

Once the Sink STE has reached the In-Frame/LL-IF state, we can say that it operates in the NORMAL (or intended) state. We expect the Sink STE to spend most of its operating lifetime in this state.

I illustrate the OTUk-dLOF Framing Alignment/Maintenance State Machine Diagram with the In-Frame/LL-IF State highlighted below in Figure 8.

Figure 8, Illustration of the OTUk-dLOF Framing Alignment/Maintenance State Machine Diagram, with the In-Frame/LL-IF State highlighted.

Whenever the Sink STE is operating in the In-Frame/LL-IF state, it can now locate the boundaries of each incoming OTUk frame. This also means that the Sink STE should be ready to start making sense of the data within the incoming OTUk data stream. It can now begin to evaluate the OTUk data stream for other defects or error conditions.

Of course, the Sink STE is telling the whole world this fact by clearing the dLOF defect condition.

Whenever the Sink STE operates in the In-Frame/LL-IF state, it is pretty tolerant of the occurrences of bit errors. In other words, if the Sink STE were to receive an OTUk frame, such that there was (for example) a single bit-error or even a burst of errors that affects one set of FAS bytes, the Sink STE would remain in the “In-Frame/LL-IF” state.

On the other hand, if the Sink STE were to lose synchronization with the incoming OTUk data stream, such that it cannot locate valid FAS bytes for five consecutive OTUk frames, then the Sink STE will transition from the LL-IF state into the LL-OOF state (within the Low-Level State Machine).

Consequently, the Sink STE will transition from the In-Frame/LL-IF state into the In-Frame/LL-OOF state.

We discuss the In-Frame/LL-OOF State below.

The In-Frame/LL-OOF State

I illustrate the OTUk-dLOF Frame Alignment/Maintenance State Machine diagram with the In-Frame/LL-OOF State highlighted below in Figure 9.

Figure 9, Illustration of the OTUk-dLOF Frame Alignment/Maintenance State Machine diagram, with the In-Frame/LL-OOF State highlighted.

If the Sink STE transitions into the In-Frame/LL-OOF state, then it means the following things:

The Sink STE has transitioned from the LL-IF state into the LL-OOF state within the OTUk-FAS OOF/IF Low-Level State Machine.
The Sink STE is still NOT declaring the dLOF (Loss of Frame) defect condition (e.g., dLOF = 0).

NOTE: We refer to this state as the “In-Frame/LL-OOF” state because the Sink STE is still NOT declaring the dLOF defect condition (just as it was NOT while operating in the In-Frame/LL-IF state).

However, the LL-OOF portion of the state’s name (e.g., In-Frame/LL-OOF) reflects that the Sink STE has transitioned into the LL-OOF state (within the Low-Level State Machine).

Only one of two possible things will happen whenever the Sink STE enters the In-Frame/LL-OOF state.

The Sink STE will eventually re-acquire synchronization with the incoming FAS frames, and it will advance back into the In-Frame/LL-OOF state, or
The Sink STE does not re-acquire synchronization with the incoming FAS frames and eventually regresses into the dLOF/LL-OOF state.

We will briefly discuss each of these two possible events below.

Advancing Back into the In-Frame/LL-IF State

If the Sink STE can locate and re-acquire the 4-byte subset of the FAS-field, then it will transition back into the In-Frame/LL-IF state. In this case, the Sink STE will continue to clear the dLOF defect condition (dLOF = 0).

Regressing to the dLOF/LL-OOF State

ITU-T G.798 requires that the Sink STE reside in the In-Frame/LL-OOF state for 3ms before it can transition into the dLOF/LL-OOF state and declare the dLOF defect condition.

This means that if the Sink STE cannot locate the FAS field (for 3ms after transitioning into the In-Frame/LL-OOF state), it will transition into the dLOF/LL-OOF state.

Whenever the Sink STE transitions into the dLOF/LL-OOF state, it will declare the dLOF defect condition (dLOF = 1).

NOTE: If the Sink STE enters the dLOF/LL-OOF state from the In-Frame/LL-IF (by way of the In-Frame/LL-OOF state), it will operate with the exact frame-start location that it had when it was running in the In-Frame/LL-IF state.

In other words, the Sink STE will continue to look for the FAS-field in the exact location (e.g., N x 16,320-byte periods later, where N is an integer) in which it was locating the FAS-field while it was operating normally in the In-Frame/LL-IF state.

In Summary

ITU-T G.798 requires that the Sink STE be able to locate the FAS field and remain in the LL-IF state for at least 3ms before it can clear the dLOF defect condition (e.g., dLOF ⇒ CLEARED).

Further, ITU-T G.798 also requires that the Sink STE NOT be able to locate the FAS field and remain in this condition (e.g., the LL-OOF state) for at least 3ms before it can declare the dLOF defect condition (e.g., dLOF ⇒ DECLARED).

ITU-T G.798 imposes these 3ms persistency requirements (for declaring and clearing the dLOF defect) to prevent intermittent transitions between the LL-OOF and LL-IF states from causing rapid changes (or chattering) in the dLOF state.

Table 1 presents a summary of the dLOF Defect Condition and how its State affects an OTN STE’s operation when handling an OTUk signal over a Single Lane (e.g., the OTSi/OTUk_A_Sk function).

Table 1, Summary of the dLOF Defect Condition and How its State affects an OTN STE’s Operation when handling an OTUk signal over a Single Lane (e.g., the OTSi/OTUk_A_Sk function).

Item	Description
Meaning of dLOF	The Sink STE (or OTSi/OTUk_A_Sk function) will declare the dLOF defect if it is not able to reliably locate the FAS field (and in-turn, the boundaries) of the incoming OTUk frames within the incoming data-stream. In short, if the Sink STE (OTSi/OTUk_A_Sk function) is declaring the dLOF defect condition, then it is NOT able to make any sense of the data within its OTUk data-stream. The Sink STE (and downstream circuitry) cannot perform any useful functions on this data-stream until it clears this defect.
Requirements to declare dLOF	The Sink STE (or OTSi/OTUk_A_Sk function) will declare the dLOF defect if it loses synchronization with the incoming FAS fields (within the incoming OTUk datastream) for at least 3ms. Additionally, the Sink STE (or OTSi/OTUk_A_Sk function) must not be declaring the dAIS (OTUk-AIS) defect condition.
Requirements to clear dLOF	The Sink STE (or OTSi/OTUk_A_Sk function) will clear the dLOF defect if it is able to maintain synchronization with the incoming FAS fields (within the incoming OTUk data-stream) for at least 3ms.
Any defects that can suppress the dLOF defect?	Yes, the Sink STE (or OTSi/OTUk_A_Sk function) cannot declare the dLOF defect, if it is currently declaring either of the following defect. - dAIS (OTUk-AIS), - dLOS-P or - TSF (Trail Signal Failure) - if upstream (optical circuitry) asserts the AI_TSF input. NOTE: Please see the blog post on the OTSi/OTUk_A_Sk function for more information about the AI_TSF signal.
Impact of declaring the dLOF defect on other defect conditions within the Sink STE (or OTSi/OTUk_A_Sk or OTUk_TT_Sk functions)	The Sink STE (or OTSi/OTUk_A_Sk and OTUk_TT_Sk functions) should NOT declare any of the following defects, whenever it is declaring the dLOF defect condition. - dLOM - dTIM - dDEG NOTE: Please see the blog post for the OTUk_TT_Sk Atomic Function for more information about the dTIM, dDEG defects and why the dLOF defect will affect these defect conditions.
Impact of declaring the dLOF defect on Downstream Circuitry (e.g., the OTUk_TT_Sk function).	The Sink STE (or OTSi/OTUk_A_Sk function) should automatically assert the CI_SSF (Server Signal Fail) signals whenever it is declaring the dLOF defect condition. This indication will notify the downstream OTUk_TT_Sk function that there is a service-affecting defect upstream. NOTE: Please see the blog post for the OTSi/OTUk_A_Sk atomic function for more information about the CI_SSF signal.
Impact of declaring the dLOF defect to Performance Monitoring.	The Sink STE (or OTSi/OTUk_A_Sk function) must inhibit Performance Monitor tallying of the pFECcorrErr (Number of Symbol Errors Corrected by FEC) for the duration that it is declaring the dLOF defect condition. NOTE: Whenever the Sink STE or OTSi/OTUk_A_Sk function declares the dLOF defect condition, it will also affect Performance Monitoring activities within the OTUk_TT_Sk atomic function.

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Declaring/Clearing dAIS Defect (OTUk)

This post describes how an OTN STE (Section Terminating Equipment) should declare and clear the dAIS Defect Condition (OTUk-AIS).

How Should an OTN STE Declare and Clear the dAIS Defect Condition (OTUk-AIS)?

In another post, we describe the OTUk-AIS Maintenance Signal.

Further, in that post, I stated that ITU-T G.709 does not require that an OTN STE be able to generate and transmit the OTUk-AIS Maintenance Signal.

However, I also stated that ITU-T G.709 DOES require that an OTN STE be capable of receiving and processing the OTUk-AIS Maintenance signal, such that it can declare and clear the OTUk-AIS defect condition.

What about this Post?

This post will discuss how an STE should declare and clear the dAIS (OTUk-AIS) defect.

NOTE: Please do not confuse this particular dAIS Defect (in response to the detection of the OTUk-AIS Maintenance signal) with the other AIS Defect (in response to receipt of the ODUk-AIS Maintenance Signal).

Although their names are similar, they are two very different maintenance signals and defects.

The OTUk-AIS Maintenance Signal Post states that the OTUk-AIS Maintenance Signal is an Unframed PN-11 Pattern. More specifically, ITU-T G.709 defines this PN-11 sequence by the generating polynomial: 1 + x⁹ + x¹¹.

How to Detect the PN-11 Pattern?

If we want to detect, declare, and clear the dAIS condition, then we need to have some ability to detect this unframed PN-11 pattern.

Fortunately, the ITU-T Standard Committee did much of the work for us and defined such a circuit within ITU-T G.798.

I show this Inverse PN-11 Circuit below in Figure 1.

Figure 1, Illustration of the Inverse PN-11 Circuit

How Does this Inverse PN-11 Circuit Work?

This Inverse PN-11 Circuit makes up a big part of our dAIS Detection Circuit (that we also mention in the post on the OTSi/OTUk_A_Sk atomic function).

The user should apply the Recovered OTUk Data and Clock Signal at the IN and Clock inputs of our Inverse PN-11 Circuit, respectively.

If our OTUk data-stream is carrying the OTUk-AIS Maintenance signal (e.g., an Unframed PN-11 signal) and if we are applying this data to the IN input (of our circuit), then our Inverse PN-11 circuit will generate an All-Zeros Pattern at the Node, that I’ve labeled OUT.

I show our Inverse PN-11 Circuit, again, below in Figure 2. However, in this figure, I also highlight these two reference points.

Figure 2, Illustration of the Inverse PN-11 Circuit – with the Locations of the OTUk-AIS Maintenance Signal and the Resulting All-Zeros Pattern Highlighted.

Before we get too excited, we need to recognize that two conditions will cause our Inverse PN-11 circuit to generate an All-Zeros Pattern at the OUT node.

Our Inverse PN-11 Circuit will generate the All-Zeros pattern at the OUT Node whenever the OTUk-AIS Maintenance Signal is present at the IN input (to this circuit), and
Our Inverse PN-11 Circuit will also generate the AIl-Zeros pattern (at the OUT Node) whenever someone applies an All-Zeros Pattern at the IN Input.

OTUk-AIS Maintenance Signal or All-Zeros Pattern Signal at the IN input?

Hence, whenever we use the Inverse PN-11 Circuit to check for the OTUk-AIS Maintenance signal, we (of course) need to check the OUT Node (or our Inverse PN-11 Circuit).

However, we also need to check and ensure that we are NOT receiving an All-Zeros pattern at the IN input.

If we are TRULY receiving the OTUk-AIS Maintenance Signal, we will see an All-Zeros pattern at the OUT Node, while the signal at the IN input is NOT an All-Zeros pattern.

I summarize how the Inverse PN-11 Detector circuit works for various signals (at the IN input) below in Table 1.

Table 1, A Truth Table presenting How the Inverse PN-11 Detector Circuit responds to Various Signals (at the IN input)

IN Input	OUT Node	Comments
All-Zeros Signal	All-Zeros Signal	An All-Zeros pattern at the IN Input results in an All-Zeros pattern at the OUT Node. No OTUk-AIS.
Ordinary OTUk Traffic	Non All-Zeros Pattern Signal	Normal Traffic Situation
OTUk-AIS Maintenance Signal	All-Zeros Signal	The Presence of an All-Zeros Signal at the OUT Node, and the Non All-Zeros pattern at the IN input indicates OTUk-AIS.

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Criteria for Declaring the dAIS Defect?

OK, we now have a basic understanding of how the Inverse PN-11 Detector circuit works. We also know what signals to look for to determine if the Inverse PN-11 Circuit detects the OTUk-AIS Maintenance signal.

Let’s now move on to the full criteria for declaring the dAIS defect.

When checking for dAIS, ITU-T G.798 recommends that we continuously monitor both of the signals at the IN input signal and the OUT Node of our Inverse PN-11 Circuit.

ITU-T G.798 goes on to (effectively) state that we should continuously check these signals over a rolling 8192 bit-interval (or sliding window, if you will).

If our Inverse PN-11 circuit detects a set of three (3) consecutive strings each of 8192-bit periods (in length), such that BOTH of the following conditions are TRUE for each of these three 8192 bit-periods, then we MUST declare the dAIS defect condition.

The number of 1s bits at the OUT Node is less than 256; AND
the number of 1s bits at the IN Input is 256 or more.

I show an illustration of the dAIS Defect Declaration Criteria below in Figure 3.

Figure 3, Illustration of the dAIS (OTUk-AIS) Defect Declaration Criteria

Criteria for Clearing the dAIS Defect Condition

On the other hand, while we are declaring the dAIS defect, if our Inverse PN-11 circuit detects a set of three (3) consecutive strings, each of 8192-bit periods (in length) such that EITHER of the following conditions is TRUE for each of these three 8192 bit periods, then we MUST clear the dAIS defect condition.

If the number of 1s bits at the OUT Node is 256 or more, OR
If the number of 1s bits at the IN input is less than 256 in three consecutive 8192-bit intervals.

I show an illustration of the dAIS Defect Clearance Criteria below in Figure 4.

Figure 4, Illustration of the dAIS (OTUk-AIS) Defect Clearance Criteria

What Entities or Atomic Functions declare and clear the dAIS (OTUk-AIS) defect condition?

The OTSi/OTUk_A_Sk function is the only atomic function that contains an Inverse PN-11 Detector circuit. Hence, it is the one atomic function that will declare or clear the OTUk-dAIS Defect condition.

NOTE: For Multi-Lane Applications, the OTSiG/OTUk_A_Sk function does not contain an Inverse PN-11 Detector circuit nor declare or clear the dAIS Defect condition.

If for some reason, an OTL3.4 or OTL4.4 signal were carrying the OTUk-AIS Maintenance Signal (which, again, is an Unframed PN-11 Pattern), then the OTSiG/OTUk_A_Sk function (that is receiving this signal) would instead, continuously declare the dLOFLANE defect condition(*) within each of the 4 or 20 Logical Lanes.

This atomic function would also declare the dLOL defect(*) as well.

NOTE: (*) – Indicates that you need to be a member of THE BEST DARN OTN TRAINING PRESENTATION…PERIOD!! to access these links.

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What is the OTSiG/OTUk_A_Sk Function?

This post briefly discusses the OTSiG/OTUk_A_Sk (OTSiG to OTUk Adaptation Sink) Function for OTU3 and OTU4 Applications.

What is the OTSiG/OTUk_A_Sk Atomic Function?

The expression: OTSiG/OTUk_A_Sk is an abbreviation for the term: Optical Tributary Signal Group to OTUk Adaptation Sink Function.

This blog post will briefly describe the OTSiG/OTUk_A_Sk set of atomic functions.

Changes in Terminology

Before we proceed on with this post, we need to cover some recent changes in terminology. Before the June 2016 Version of ITU-T G.709, the standard documents referred to this particular atomic function as the OPSM/OTUk_A_Sk function.

However, the standards committee has recently decided to change the wording from using the term OPSM (Optical Physical Section Multilane) to using the name OTSiG (for Optical Tributary Signal Group).

What is an OTSiG?

For completeness, I will tell you that ITU-T G.709 defines the term OTSiG as:

“The set of OTSi signals that supports an OTU.”

In other words, an OTSiG supports transporting an OTUk signal over multiple lanes in parallel.

Therefore, where we used the OTSi/OTUk_A_So and OTSi/OTUk_A_Sk functions for ‘single-lane” applications, we will use the OTSiG/OTUk_A_So and OTSiG/OTUk_A_Sk functions for “multi-lane” applications.

In summary, to “speak the same language,” as does the standard committee, we will call this atomic function the OTSiG/OTUk_A_Sk atomic function.

Likewise, in another post, we will now call (what we used to call the OPSM/OTUk_A_So function) the OTSiG/OTUk_A_So function.

I have created another post that provides documentation of the relationships between some of the old (now obsolete) terms and the new (and approved) terms that our standards committee is currently using.

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Some More Information about Multi-Lane Interfaces for OTU3 and OTU4 Applications

First, we only use the OTSiG/OTUk_A_Sk and OTSiG/OTUk_A_So functions for OTU3 and OTU4 Multi-Lane applications.

We will use the OTSiG/OTUk_A_Sk function for OTU3 applications to model circuitry that receives and processes an OTU3 data stream via an OTL3.4 interface. ITU-T G.709 defines the OTL3.4 Interface as an approach to transporting OTU3 traffic over 4-lanes in parallel.

Likewise, we will use the OTSiG/OTUk_A_Sk function for OTU4 applications to model circuitry that receives and processes an OTU4 data stream via an OTL4.4 interface. ITU-T G.709 also defines the OTL4.4 Interface as an approach to transporting OTU4 traffic over 4-lanes in parallel.

Please see the blog posts for the OTL3.4 and OTL4.4 Interfaces for more information on these topics.

The OTSiG/OTUk_A_Sk Function

The OTSiG/OTUk_A_Sk function is any circuit that takes a group of four electrical lane signals (e.g., the OTSiG signal) and converts this data back into the OTUk signal.

More specifically, the System-Designer will apply this OTSiG group of signals (which are of the OTL3.4 format for OTU3 applications and the OTL4.4 format for OTU4 applications) to the OTSiG_AP Input Interface.

NOTE: These OTL3.4 or OTL4.4 format signals carry a fully-framed, scrambled OTU3 or OTU4 data stream, often including Forward-Error-Correction.

The OTSiG/OTUk_A_Sk function will then:

Multiplex each of these four electrical lanes (of the OTL3.4 or OTL4.4 signals) back into a single OTU3 or OTU4 data stream.
Afterward, this function will descramble this OTU3/4 data stream, decode the FEC, and then convert this group of signals into OTUk data, clock, frame-start, and multi-frame-start signals.
Finally, this function will output these signals to downstream circuitry (such as the OTUk_TT_Sk function).

Once again, ITU-T G.798 states that the system designer can use this function for either OTU3 or OTU4 rates.

For OTU1 and OTU2 rates, we recommend that the system designer use the OTSi/OTUk_A_Sk function instead.

We discuss the OTSi/OTUk_A_Sk atomic function in another post.

Figure 1 presents a simple illustration of the OTSiG/OTUk_A_Sk function.

Figure 1, Simple Illustration of the OTSiG/OTUk_A_Sk function.

Versions of the OTSiG/OTUk_A_Sk Function

ITU-T G.798 defines two versions of this particular function. Additionally, there are other versions of this function that are not specified by ITU-T G.798. I list some popular versions of this function below in Table 1.

Table 1, List of Some Popular Versions of the OTSiG/OTUk_A_So function.

Function Name	Description	Comments
OTSiG/OTUk-a_A_Sk	OTSiG to OTUk Adaptation Sink Function with ITU-T G.709 Standard FEC.	Can be used for OTU3 and OTU4 applications ONLY.
OTSiG/OTUk-b_A_Sk	OTSiG to OTUk Adaptation Sink Function with No FEC.	Can be used for OTU3 Applications.
OTSiG/OTUk-v_A_Sk	OTSiG to OTUk Adaptation Sink Function with Vendor-Specific FEC	Can be used for OTU3 and OTU4 Applications. Not specified by ITU-T G.798.

Table 1 shows that the OTSiG/OTUk-a_A_Sk and the OTSiG/OTUk-v_A_Sk functions will compute and decode some sort of FEC field within the backend of each incoming OTUk frame.

However, this table also shows that the OTSiG/OTUk-b_A_Sk version does not support FEC decoding.

Therefore, ITU-T G.798 states that one can use the OTSiG/OTUk-a_A_Sk function for OTU3 and OTU4 applications. Further, the standard recommends that the user NOT use the OTSiG/OTUk-b_A_Sk function for OTU4 applications.

Network Equipment operating at the OTU4 rate is required to use Forward-Error-Correction.

What Version (of the OTSiG/OTUk_A_Sk function) will we Discuss Throughout this Post?

Throughout this post, we will be discussing the OTSiG/OTUk-a_A_Sk version of this atomic function.

The OTSiG/OTUk-b_A_Sk and OTSiG/OTUk-v_A_Sk atomic functions do everything that the OTSiG/OTUk-a_A_Sk does, except that the -b version does NO FEC Decoding, and the -v version does FEC Decoding differently than what I describe here.

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So What All Does this Atomic Function Do – In Detail?

The OTSiG/OTUk-a_A_Sk function will accept the 4-lanes of traffic that make up the OTSiG signals from upstream Optical-to-Electrical Conversion circuitry. This function will perform the following tasks on this incoming data stream.

Multiplexing – It will multiplex each of the four lanes of traffic of the OTL3.4 or OTL4.4 signal back into a single OTU3 or OTU4 signal, respectively.
Descrambling – It will descramble this incoming data stream.
FEC Decoding – The function will decode the FEC field (within the backend of each incoming OTUk frame) and detect and correct most symbol errors within this data stream.
Extract the Frame-Start and Multi-Frame Start signals from this incoming data stream.
Detect and Flag the following service-affecting defect conditions.
- dLOS-P – Loss of Signal – Path (for each of the four electrical lanes)
- dLOFLANE – Loss of Frame, Lane Signal – (for each of the 4 or 20 logical lanes)(*)
- dLOF – Loss of Frame (Optional)
- dLOM – Loss of Multiframe
- dLOL – Loss of Lane Alignment (*)
Assert the CI_SSF (Server Signal Fail Indicator) output signal (towards the downstream OTUk_TT_Sk function) anytime it declares any service-affecting defect.
Output the remaining OTUk data stream, the OTUk clock signal, the Frame-Start, and Multiframe Start signals to downstream circuitry (e.g., typically the OTUk_TT_Sk atomic function).

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Figure 2 illustrates a Unidirectional Connection that shows where the OTSiG/OTUk-a_A_Sk function “fits in” within a system.

Figure 2, Illustration of an STE, transmitting an OTUk signal (over optical fiber) to another STE – the OTSiG/OTUk-a_A_Sk function is highlighted.

Functional Description of this Atomic Function

Let’s now take a closer look at this function.

The OTSiG/OTUk-a_A_Sk functional block diagrams are different for OTU3 applications than for OTU4 applications. Therefore, we will first walk through the Functional Block Diagram for OTU3 applications.

Afterward, we will do the same for OTU4 applications.

Review of the OTSiG/OTU3-a_A_Sk Functional Block Diagram – OTU3 Applications

Figures 3 and 4 present the Functional Block Diagram of the OTSiG/OTUk-a_A_Sk Atomic Function for OTU3 applications.

NOTE: The Functional Block Diagrams for this function are rather large and complicated. Therefore, I had to spread the OTU3 Functional Block Diagram over two figures (Figures 3 and 4).

More specifically, Figure 3 presents the OTUk_CP Side of the OTSiG/OTUk-a_A_Sk function, and Figure 4 shows the OTSiG_AP Side of this function.

Figure 3, The OTUk_CP Interface Side of the OTSiG/OTUk-a_A_Sk function.

Figure 4, The OTSiG_AP Interface Side of the OTSiG/OTUk-a_A_Sk function.

Therefore, Figures 3 and 4 show that the OTU3-version of this function contains the following functional blocks.

Clock-Recovery and LOS-Detection Block
Lane Frame Alignment Block
The Lane Alignment Recovery Block
Lane-Marker and Delay-Processing Block
Elastic Store
16-Byte Block MUX
(OTU3) Frame-Alignment and dLOF-Detection Block
Descrambler Block
FEC Decoder Block
Multi-Frame Alignment and dLOM Detection Block

I will briefly discuss each of these functional blocks below.

The Clock-Recovery and dLOS-Detection Block (4 for OTU3 Applications)

Once our 4-lane Optical Signal passes through the Optical-to-Electrical Conversion (or Demodulator) circuitry, it will be an electrical OTL3.4 signal. The System-Designer should route each of these OTL3.4 electrical lanes signals to the AI_PLD[1] to AI_PLD[4] inputs to this function.

Once these electrical signals enter the OTSiG/OTU3-a_A_Sk function, they will pass through their corresponding Clock Recovery and dLOS Detection Block.

I show an illustration of the OTSiG_AP Side of the OTSiG/OTU3-a_A_Sk Functional Block Diagram below with the Clock Recovery and dLOS Detection blocks, highlighted below in Figure 5.

Figure 5, Illustration of the OTSiG_AP Side of the OTSiG/OTU3-a_A_Sk Functional Block Diagram, with the Clock Recovery and dLOS Detection blocks highlighted.

The OTSiG/OTU3-a_A_Sk function has four Clock Recovery and dLOS Detection Blocks (one for each of the four lanes within the incoming OTL3.4 signal).

The Clock Recovery block is responsible for recovering the clock signal and the data content within a given OTL3.4 lane signal via its corresponding AI_PLD[n] input pin.

Since the OTSiG/OTUk-a_A_So atomic function (at the remote STE) should have scrambled this data stream, each of these incoming lane signals should always have good timing content (or transitions) so that this Clock Recovery block can acquire and extract out both a recovered clock signal and data-stream from each of these incoming lane signals.

Suppose the Clock Recovery block (along with the dLOS Detection Block) were to determine that there is a lengthy absence in signal transitions (within its incoming lane data-stream). In that case, it will declare the dLOS-P (Loss of Signal – Path) defect for that particular electrical lane.

Please check out the dLOS blog post for more information about the dLOS-P defect condition.

The OTSiG/OTUk-a_A_Sk function will route this recovered clock and data signal (for each electrical lane) to its Lane Frame Alignment block for further processing.

Lane Frame Alignment Block (4 for OTU3 Applications)

The OTSiG/OTU3-a_A_Sk function contains 4 Lane Frame Alignment blocks, one for each Logical (or Electrical) Lane.

I show an illustration of the OTSiG/OTU3-a_A_Sk Functional Block Diagram with the Lane Frame Alignment Blocks highlighted below in Figure 6.

Figure 6, Illustration of the OTSiG/OTU3-a_A_Sk Functional Block Diagram with the Lane Frame Alignment Blocks highlighted.

In the OTL3.4 post, we mention that (as we create these OTL3.4 lane signals, we purpose “Lane Rotation” as each frame boundary to ensure that each logical lane will carry the FAS-field at some point.

These Lane Frame Alignment blocks aim to acquire FAS-Frame Synchronization with their corresponding Logical Lane signal. In other words, these Lane Frame Alignment blocks strive to locate each FAS field and maintain a Lane-FAS Frame synchronization with their respective lanes.

Each Lane Frame Alignment block will also declare and clear the dLOFLANE (Loss of Frame – Lane) defect condition as appropriate. Please see the post on the dLOFLANE defect for more information about this defect condition.

The OTSiG/OTU3-a_A_Sk Function will route these logical lane signals to their own Lane Alignment Recovery Blocks.

Lane Alignment Recovery Block (4 for OTU3 Applications)

The OTSiG/OTU3-a_A_Sk Function contains four Lane Alignment Recovery blocks (one for each Logical Lane it processes).

I show an illustration of the OTSiG/OTU3-a_A_Sk Functional Block Diagram with the Lane Alignment Recovery blocks highlighted below in Figure 7.

Figure 7, Illustration of the OTSiG/OTU3-a_A_Sk Functional Block Diagram with the Lane Alignment Recovery blocks highlighted.

These Lane Alignment Recovery blocks aim to acquire LLM (Logical Lane Marker) Frame Synchronization with its corresponding Logical Lane signal.

The Lane Alignment Recovery blocks also have the following responsibilities:

To report the LLM value, within its logical lane, to the Lane Marker and Delay Processing block, and
To alert the Lane Marker and Delay Processing block, the instant that (the Lane Alignment Recovery block) detects and receives the LLM fields within its incoming Logical Lane data stream.

Four blocks will work in tandem with the Lane Marker and Delay Processing block to declare and clear the dLOL (Loss of Lane Alignment) defect condition.

Please see the blog post on the dLOL defect to learn more about this defect condition.

Once a given Logical Lane signal passes through the Lane Alignment Recovery block, the OTSiG/OTU3-a_A_Sk function will route these signals to the Elastic Store block for further processing.

Lane Marker and Delay Processing Block (1 for OTU3 Applications)

The OTSiG/OTU3-a_A_Sk function only has one Lane Marker and Delay Processing block.

I illustrate the OTSiG/OTU3-a_A_Sk Functional Block Diagram with the Lane Marker and Delay Processing Block highlighted below in Figure 8.

Figure 8, Illustration of the OTSiG/OTU3-a_A_Sk Functional Block Diagram with the Lane Marker and Delay Processing Block highlighted.

The Lane Marker and Delay Processing block have the following responsibilities:

To declare and clear the dLOL defect condition.
To compensate for skew between each of the four Logical Lanes.
And to ensure that each Logical Lane will be processed in the correct order/sequence, the OTSiG/OTU3-a_A_Sk function will successfully reconstruct the original OTU3 data stream.
To ensure that each Logical Lane has its unique value for the LLM ID.

To accomplish this, the Lane Marker and Delay Processing block will work in tandem with each of the 4 Lane Alignment Recovery blocks and the Elastic Store blocks.

In general, the Lane Marker and Delay Processing block will use the “LLM Received” information from each of the 4 Lane Alignment Recovery blocks to determine the amount of skew between them.

The Lane Marker and Delay Processing block will use the Elastic Store blocks to buffer and delay all of the “faster” Logical lanes until the “slowest” (or most delayed) Logical Lane “catches up.”

Once this slowest Logical Lane catches up, the Lane Marker and Delay Processing block will allow the 16-Byte MUX to read out the contents of the logical lane data from each of the 4 Elastic Store blocks.

The Elastic Store Block (4 for OTU3 Applications)

The OTSiG/OTU3-a_A_Sk function contains four Elastic Store blocks (one for each Logical Lane).

I illustrate the OTSiG/OTU3-a_A_Sk Functional Block Diagram with the Elastic Store blocks highlighted below in Figure 9.

Figure 9, Illustration of the OTSiG/OTU3-a_A_Sk Functional Block Diagram with the Elastic Store blocks highlighted.

The Elastic Store block is an array of buffers (or storage) within the four logical lanes. The OTSiG/OTU3-a_A_Sk function will load the contents of each Logical Lane data stream into this buffer as it arrives at this block.

However, the Lane Marker and Delay Processing Block will determine how long this data will remain in this Elastic Store block before it travels downstream towards the 16-Byte Block MUX.

The Lane Marker and Delay Processing block will control exactly when this Logical Lane data is read out from each of the 4 Elastic Store blocks to compensate for skew between each Logical Lanes.

16-Byte Block MUX (1 for OTU3 Applications)

The OTSiG/OTU3-a_A_Sk function contains one 16-Byte Block MUX.

I show an illustration of the OTUk_CP Interface Side of the OTSiG/OTU3-a_A_Sk Functional Block Diagram, with the 16-Byte Block MUX highlighted below in Figure 10.

Figure 10, Illustration of the OTSiG/OTU3-a_A_Sk Functional Block Diagram (OTUk_CP Side) with the 16-Byte Block MUX Highlighted.

The purpose of the 16 Byte Block MUX is to read out the contents of each of the Elastic Store blocks (with each of the four Logical Lanes) and to multiplex this data into a single OTU3 data stream.

The 16 Byte Block MUX (as its name implies) will read out data, 16 bytes at a time, from each of the four Elastic Store blocks. Additionally, the 16-Byte Block MUX will execute these READ Operations under the direction of the Lane Marker and Delay Processing block.

The 16 Byte Block MUX, the Lane Marker, and Delay Processing Blocks, and the Lane Alignment Recovery blocks will work together to:

Compensate for skew between each of the Logical Lanes, and
Properly multiplex and (reassemble) a full-blown, serial OTU3 data stream.

After the 16-Byte Block MUX has reassembled this OTU3 data stream, it will route this data stream over to the (OTU3) Lane Frame Alignment and dLOF Detection Block for further processing.

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(OTU3) Frame Alignment and dLOF Detection Blocks

Once our data stream has reached the Frame Alignment and dLOF Detection Block, we are no longer working with OTL3.4 Logical Lanes. The 16 Byte Block MUX has multiplexed all four logical lanes into a single OTU3 data stream.

I illustrate the OTSiG/OTU3-a_A_Sk Functional Block Diagram with the Frame Alignment and dLOF Detection Blocks highlighted below in Figure 11.

Figure 11, Illustration of the OTSiG/OTU3-a_A_Sk Functional Block Diagram with the Frame Alignment and dLOF Detection Blocks highlighted.

The only question now is: Did we multiplex the four OTL3.4 Logical Lanes together correctly?

If we were to assume all of the following conditions to be true:

That none of the four Frame Alignment Blocks (within the OTSiG/OTU3-a_A_Sk function) were declaring the dLOFLANE defect condition, and
The Lane Marker and Delay Processing block did not report any issues with Excessive Skew.

Then the 16-Byte Block MUX should have correctly and successfully multiplexed these four Logical Lanes into a single valid OTU3 data stream.

However, the (OTU3) Frame Alignment and dLOF Detection Block can serve as an additional check to ensure that our multiplexing operation is successful. This is why I’ve listed this particular functional sub-block as “Optional.”

This sub-block aims to acquire and maintain OTUk-FAS Frame Synchronization with this newly combined OTU3 data stream. If this block fails to obtain and maintain synchronization with the incoming FAS frames, it will declare the dLOF (Loss of Frame) defect condition.

Please see the dLOF (Loss of Frame) blog post for more information on how the Frame Alignment and dLOF Detection Block declare and clear the dLOF defect condition.

Once this OTU3 data stream leaves the Frame Alignment and dLOF Detection Block, it will enter the Descrambler Block for further processing.

Descrambler Block

In the OTSiG/OTUk-a_A_So blog post, I mentioned that the OTSiG/OTUk-a_A_So function would scramble the content of each outbound OTUk frame.

That function will scramble all bytes (within each OTUk frame) except for the FAS fields. This function will even scramble the MFAS field as well.

The purpose of the Descrambler block is to restore the content of each OTUk frame to its original state before being scrambled by the remote STE.

I show an illustration of the OTSiG/OTU3-a_A_Sk Functional Block Diagram with the Descrambler block highlighted below in Figure 12.

Figure 12, Illustration of the OTSiG/OTU3-a_A_Sk Functional Block Diagram with the Descrambler block highlighted.

In the OTSiG/OTUk-a_A_So function, we scrambled the contents of OTUk frame, using the polynomial generating equation of 1 + x + x³ + x¹² + x¹⁶.

Therefore, the Descrambler block (within this function) will descramble the incoming OTUk data-stream (again) using the polynomial generating equation of 1 + x + x³ + x¹² + x¹⁶.

I show a simple diagram of how one can implement the Descrambler within their OTSiG/OTUk-a_A_Sk function design below in Figure 13.

Figure 13, High-Level Block Diagram of the Frame Synchronous Descrambler.

I discuss the Descrambler function and requirements in greater detail in another post.

Once the OTU3 data stream passes through and exits the Descrambler block, it will proceed onto the FEC Decoder block for further processing.

FEC Decoder Block

I illustrate the OTSiG/OTU3-a_A_Sk Functional Block Diagram with the FEC Decoder block highlighted below in Figure 14.

Figure 14, Illustration of the OTSiG/OTU3-a_A_Sk Functional Block Diagram with the FEC Decoder block highlighted.

The OTSiG/OTU3-a_A_So function (at the remote STE) is responsible for performing FEC (Forward-Error-Correction) Encoding.

This means that this function computed a FEC Code and inserted that code into a 4-row x 128-byte column field at the backend of each OTU3 frame, as shown below in Figure 15.

Figure 15, Illustration of the OTUk Frame Format with the FEC Field Highlighted

The purpose of the FEC Decoder (within the OTSiG/OTU3-a_A_Sk function) is to parse through the incoming OTU3 data stream and (by using the contents of the FEC-field) detect and correct most symbol errors within this data stream.

The FEC Decoder block will count and tally any occurrences of Symbol errors (within the incoming OTU3 data stream.). It will report this information to System Management via the MI_pFECcorrErr output (via the OTSiG/OTU3-a_A_Sk_MP Interface).

I discuss Forward-Error-Correction in much greater detail in another post.

Multi-Frame Alignment and dLOM Detection Block

Once the incoming OTU3 data stream passes through the FEC Decoder block, the OTSiG/OTU3-a_A_Sk function will route this signal to the Multi-Frame Alignment and dLOM Detection blocks.

I illustrate the OTSiG/OTU3-a_A_Sk Function Block Diagram with the Multi-Frame Alignment and dLOM Detection block, highlighted below in Figure 16.

Figure 16, Illustration of the OTSiG/OTU3-a_A_Sk Functional Block Diagram with the Multi-Frame Alignment and dLOM Detection Block highlighted.

The Mult-Frame Alignment block will parse through and check the contents of the MFAS field within the incoming OTU3 data stream. The Multi-Frame Alignment block will check the contents of this data stream to see if it (and the dLOM Detection Block) should declare or clear the dLOM (Loss of Multi-Frame Alignment) defect condition.

Please see the blog post on the dLOM defect for more information on how the Multi-Frame Alignment block will declare and clear the dLOM defect condition.

Removal of the FAS, MFAS, and FEC Fields from the incoming OTU3 Data-stream

The Frame-Alignment block will drive the CI_FS (Frame-Start) output of the OTUk_CP Interface, HIGH for one CI_CK (Clock Signal) period, each time it detects the FAS field within its incoming OTUk data-stream.

Likewise, the Multi-Frame Alignment block will drive the CI_MFS (Multi-Frame Start) output of the OTUk_CP Interface, HIGH, for one CI_CK (Clock Signal) period each time it receives an MFAS byte with the value of 0x00.

The Frame-Alignment and Multi-Frame Alignment block will also remove the FAS and MFAS fields from the OTUk data stream (before it outputs this data stream via the CI_D output of the OTUk_CP Interface).

From this point on, the CI_FS and CI_MFS signals will now carry the framing and multi-framing alignment information downstream towards the OTUk_TT_Sk atomic function.

The FEC Decoder block will also remove the contents of the FEC field from the OTUk data stream before it outputs this data via the CI_D output pin.

We have briefly covered the OTSiG/OTUk-a_A_Sk function description for OTU3 applications. Let’s move on and discuss this atomic function for OTU4 applications.

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Review of the OTSiG/OTU4-a_A_Sk Functional Block Diagram – OTU4 Applications

I present the Functional Block Diagram of the OTSiG/OTUk-a_A_Sk Atomic Function for OTU4 Applications below in Figures 14, 15, and 16.

NOTE: The Functional Block Diagrams for this function are rather large and complicated. Therefore, I had to spread the OTU3 Functional Block Diagram over three figures (Figures 17, 18, and 19).

Figure 17 presents the OTUk_CP Side of the OTSiG/OTUk-a_A_Sk function.

Figure 17, Illustration of the Functional Block Diagram of the OTSiG/OTU4-a_A_Sk Atomic Function – The OTUk_CP Interface Side

Additionally, Figure 18 presents the Middle Portion of the OTSiG/OTUk-a_A_Sk function.

Figure 18, Illustration of the Functional Block Diagram of the OTSiG/OTU4-a_A_Sk Atomic Function – The Middle Portion

Finally, Figure 19 shows the OTSiG_AP Side of this function.

Figure 19, Illustration of the Functional Block Diagram of the OTSiG/OTU4-a_A_Sk Atomic Function – The OTSiG_AP Interface Side

Hence, these figures show that the OTU4 version of this function contains the following functional sub-blocks.

The Clock Recovery and dLOS Detector Block
The 1/5 Bit De-Interleaver Blocks
The Lane Frame Alignment Blocks
The Lane Alignment Recovery Blocks
The LLM Removal Block
The Lane Marker and Delay Processing Block
The Elastic Store Blocks
The 16-Byte Block MUX
The (OTU4) Frame Alignment – dLOF Detection Block
The Descrambler Block
The FEC Decoder Block
The Multi-Frame Alignment and dLOM Detection Block

I will discuss some of these Functional blocks below. Please note that some of these blocks are identical to what I’ve presented for OTU3 applications. I will note that whenever I come across those functional sub-blocks.

The Clock Recovery and dLOS Detection Block (4 for OTU4 Applications)

Please see the description for the Clock Recovery and dLOS Detection Block above for OTU3 applications.

The 1/5 Bit De-Interleaver Blocks (4 for OTU4 Applications)

Once the OTL4.4 signal passes through the Clock Recovery block, it will proceed onto the 1/5 Bit De-Interleaver blocks for further processing.

The OTSiG/OTU4-a_A_Sk function contains four of these 1/5 Bit De-Interleaver Blocks.

I illustrate the OTSiG/OTU4-a_A_Sk Functional Block Diagram with the 1/5 Bit De-Interleaver blocks highlighted below in Figure 20.

Figure 20, Illustration of the OTSiG/OTU4-a_A_Sk Functional Block Diagram with the 1/5 Bit De-Interleavers blocks highlighted.

Each lane (within the incoming OTL4.4 signal) will pass through its own 1/5 Bit De-Interleaver Blocks.

Each of these 1/5 Bit De-Interleaver blocks will bit-wise demultiplex five logical lanes of traffic from each incoming electrical lane. Therefore, when the four lanes (within an OTL4.4 signal) pass through their own 1/5 Bit De-Interleaver blocks, they will demultiplex this OTL4.4 signal into 20 logical lanes of traffic.

The Lane Frame Alignment Block (20 for OTU4 Applications)

Please see the description for the Lane Frame Alignment Block above for OTU3 applications. Please note that the OTSiG/OTU4-a_A_Sk function will have 20 blocks, whereas the OTU3 version only has 4.

The Lane Alignment Recovery Blocks (20 for OTU4 Applications)

Please see the description for the Lane Alignment Recovery Block above for OTU3 applications. Please note that the OTSiG/OTU4-a_A_Sk function will have 20 blocks, whereas the OTU3 version only has 4.

The LLM (Logical Lane Marker) Removal Blocks (20 for OTU4 Applications)

Once each Logical Lane signal passes through and exits their Lane Alignment Recovery block, they will proceed to their respective LLM Removal Blocks.

I illustrate the OTSiG/OTU4-a_A_Sk functional block diagram with the LLM Removal Blocks highlighted below in Figure 21.

Figure 21, Illustration of the OTSiG/OTU4-a_A_Sk Functional Block Diagram with the LLM Removal Blocks highlighted.

If you recall, from our OTL4.4 post, the OTSiG/OTU4-a_A_Sk function (at the remote STE) will “borrow” the 3rd OA2 byte (within the FAS field of each outbound OTU4 frame) and use it as the LLM (Logical Lane Marker) field.

I illustrate the OTU4 Frame format with this LLM (and borrowed OA2) byte-field highlighted below in Figure 22.

Figure 22, Illustration of an OTU4 Frame with the LLM Field location highlighted.

The purpose of the LLM Removal (in this function) is to remove the LLM field from this 3rd OA2 byte-field and (effectively) give this byte back to the transport system by restoring its value to 0x28.

Once the Logical Lane data stream passes through to the LLM Removal Block, it will proceed to the Elastic Store block for further processing.

The Lane Marker and Delay Processing Block (1 for OTU4 Applications)

Please see the description for the Lane Marker and Delay Processing Block above for OTU3 applications. Please note that the Lane Marker and Delay Processing Block within the OTSiG/OTU4-a_A_Sk function will be working with 20 sets of the Lane Alignment Recovery and Elastic Store Blocks for Skew Compensation purposes.

The Elastic Store Blocks (20 for OTU4 Applications)

Please see the description for the Elastic Store Block above for OTU3 applications. Please note that the OTSiG/OTU4-a_A_Sk function will have 20 blocks, whereas the OTU3 version only has 4.

The 16-Byte Block MUX

Please see the description for the Elastic Store Block above for OTU3 applications.

The (OTU4) Frame Alignment – dLOF Detection Blocks

Please see the description for the Elastic Store Block above for OTU3 applications.

The Descrambler Blocks

Please see the description for the Elastic Store Block above for OTU3 applications.

The FEC Decoder Block

Please see the description for the Elastic Store Block above for OTU3 applications.

The Multi-Frame Alignment – dLOM Detection Blocks

Please see the description for the Elastic Store Block above for OTU3 applications.

Consequent Actions Blocks

I illustrate the OTSiG/OTU4-a_A_Sk function with the Consequent Actions blocks highlighted below in Figure 23.

Figure 23, Illustration of the OTSiG/OTU4-a_A_Sk function with the Consequent Actions block highlighted.

In most cases, the System Designer will realize the Consequent Actions Block via digital logic circuitry that will assert the CI_SSF (Server Signal Fail) output (of the OTUk_CP Interface) anytime the OTSiG/OTUk-a_A_Sk function declares the following defect conditions.

dLOS-P – Loss of Signal Defect Condition
dLOFLANE – Loss of Frame – Lane Defect Condition(*)
dLOL – Loss of Lane Alignment Defect Condition(*)
dLOF – Loss of Frame Defect Condition (if implemented)
dLOM – Loss of Multi-Frame Alignment Defect Condition
AI_TSF – If the upstream circuitry asserts the AI_TSF-P input pin to this function.

NOTE: Whenever this function asserts the CI_SSF output signal, it also asserts the CI_SSF input to the downstream OTUk_TT_Sk function.

The Consequent Action Equation for the OTSiG/OTUk-a_A_Sk Atomic Function

ITU-T G.798 lists the following Consequent Actions Equation below:

aSSF ⇐ dLOF or dLOM or ∑dLOS-P[i] or dLOL or ∑dLOFLANE[j] or AI_TSF

This equation means that the OTSiG/OTUk-a_A_Sk function should assert the aSSF (and, in turn, drive the CI_SSF output pin HIGH) if any of the following conditions are TRUE:

The upstream Optical Circuitry is asserting the AI_TSF-P input signal to this function, or
If the OTSiG/OTUk-a_A_Sk function is declaring any of the following defect conditions:
- dLOS-P[i] – The Loss of Signal – Path defect within any Electrical Lane i, where i can range from 1 to 4.
- dLOFLANE[j] – The Loss of Frame – Lane defect within any Logical Lane j, where j can range from 1 to 4 (for OTU3 applications) or 1 to 20 (for OTU4 applications).
- dLOL – The Loss of Lane Alignment Defect
- dLOF – The Loss of Frame Defect (with the composite OTU3 or OTU4 signal)
- dLOM – The Loss of Multi-Frame Alignment Defect (with the composite OTU3 or OTU4 signal).

Defect Correlation

If you wish to learn more about Defect Correlation and how you should interpret it, please see the Defect Correlation Post.

ITU-T G.798 specifies the following correlation equations for each OTSiG/OTUk-a_A_Sk function-related defect.

cLOS ⇐ ∑dLOS-P[i] and (NOT AI_TSF-P)
cLOL ⇐ (dLOL or ∑dLOFLANE[j]) and (NOT ∑dLOS-P[i]) and (NOT AI_TSF-P)
cLOF ⇐ dLOF and (NOT ∑dLOS-P[i]) and (NOT AI_TSF-P)
cLOM ⇐ dLOM and (NOT dLOF) and (NOT ∑dLOS-P[i]) and (NOT AI_TSF)

I will briefly explain what each of these equations means below.

cLOS ⇐ ∑dLOS-P[i] and (NOT AI_TSF-P)

This equation means that the OTSiG/OTUk_A_Sk function must declare the dLOS defect (and assert the cLOS output pin) if the Clock Recovery and dLOS Detection Circuitry declares the dLOS-P signal within any one of the four electrical lane signals.

This equation also states that the OTSiG/OTUk_A_Sk function must NOT declare the dLOS (and assert the cLOS output pin) if the upstream Optical Circuitry is also asserting the AI_TSF-P input signal (to this function).

cLOL ⇐ (dLOL or ∑dLOFLANE[j]) and (NOT ∑dLOS-P[i]) and (NOT AI_TSF-P)

This equation means that the OTSiG/OTUk_A_Sk function should only declare the dLOL defect (and assert the cLOL output pin) if either of the following conditions is TRUE:

If the Lane Marker and Delay Processing block is declaring the dLOL defect, OR
If at least one of the 4 or 20 Logical Lanes declare the dLOFLANE defect conditions.

However, this equation also states that the function CANNOT declare the dLOL defect (and drive the cLOL output pin HIGH) if either of the following conditions is TRUE:

At least one Clock Recovery and dLOS Detection circuit is also declaring the dLOS-P defect conditions with any one of the four electrical lane signals, OR
The upstream circuitry currently asserts the AI_TSF-P input pin (to this function).

cLOF ⇐ dLOF and (NOT ∑dLOS-P[i]) and (NOT AI_TSF-P)

This equation means that the OTSiG/OTUk-a_A_Sk function should only declare the dLOF defect (and assert the cLOF output pin) if the Frame Alignment block and the dLOF Detection blocks declare the dLOF defect condition.

However, this equation also states that the function CANNOT declare the dLOF defect (and drive the cLOF output pin HIGH) if any of the following conditions are TRUE:

At least one Clock Recovery and dLOS Detection circuit is also declaring the dLOS-P defect conditions with any one of the four electrical lane signals, OR
The upstream optical circuitry is currently asserting the AI_TSF-P input pin (to this function).

cLOM ⇐ dLOM and (NOT dLOF) and (NOT ∑dLOS-P[i]) and (NOT AI_TSF-P)

This equation means that the OTSiG/OTUk-a_A_Sk function should only declare the dLOM defect (and assert the cLOM output pin) if the Multi-Frame Alignment block and the dLOM Detection blocks declare the dLOM defect condition.

However, this equation also states that the function CANNOT declare the dLOM defect (and drive the cLOM output pin HIGH) if any of the following conditions are TRUE:

The Frame Alignment and dLOF Detection blocks are also declaring the dLOF defect condition, or
If at least one Clock Recovery and dLOS Detection block is declaring the dLOS defect with its electrical lane signal, or
The Optical upstream circuitry is currently asserting the AI_TSF-P input pin (to this function).

Performance Monitoring

ITU-T G.798 requires that the OTSiG/OTUk-a_A_Sk Function tally and report the following Performance Monitoring parameter to System Management:

pFECcorrErr ⇐ ∑nFECcorrErr

In other words, we expect the OTSiG/OTUk-a_A_Sk function to tally and report each time the FEC Decoder block corrects an errored symbol within the incoming OTU3 or OTU4 data stream.

Pin Description

I list the Input/Output Pin Description for the OTSiG/OTUk-a_A_Sk Atomic Function below in Table 2.

Table 2, Pin Description for the OTSiG/OTUk-a_A_Sk Atomic Function

Signal	Type	Description
OTSiG Access Point - Interface
AI_PLD[1...4]	Input	OTSiG Adaptation Information - PLD (Payload) Input Ports 1 through 4: The user is expected to apply a 4-lane electrical signal to these inputs. This four-lane signal should be an OTL3.4 type of signal for OTU3 applications and an OTL4.4 type of signal for OTU4 applications. In most cases, this 4-lane electrical signal will have just recently been converted from the optical, back into the electrical format. The OTSiG/OTUk-a_A_Sk function will convert the 4-lane OTL3.4 signal back into a single-composite OTU3 signal. Likewise, this function will also convert the 4-lane OTL4.4 signal back into a single-composite OTU4 signal.
OTUk - Characteristic Information
CI_D	Output	OTUk Characteristic Information - Data Output: The OTSiG/OTUk-a_A_Sk function will output the OTUk data via this output. This OTUk data will contain all of the following portions of the OTUk frame. - OTUk-SMOH (Section Monitoring Overhead) data - All remaining OTUk payload data (e.g., the ODUk/OPUk data). This data will not include the FAS, MFAS nor FEC fields, however. Data that is output via this signal, will be aligned with one of the clock edges of the CI_CK clock output signal. The system designer will typically route this signal to the CI_D input to the downstream OTUk_TT_Sk function.
CI_CK	Output	OTUk Characteristic Information - Clock Output: As the OTUk CP Interface outputs data via the CI_D, CI_FS, CI_MFS and CI_SSF outputs; all of this data will be updated to one of the clock edges of this clock output signal.
CI_FS	Output	OTUk Characteristic Information - Frame Start Output: The OTUk_CP interface will pulse this output signal HIGH whenever the OTUk_CP interface outputs the very first bit (or byte) of a new OTUk frame, via the CI_D output. This output signal will pulse HIGH once for each OTUk frame.
CI_MFS	Output	OTUk Characteristic Information - Multi-Frame Start Output: The OTUk_CP Interface will pulse this output signal HIGH whenever the OTUk_CP Interface outputs the very first bit (or byte) of a new OTUk multi-frame, via the CI_D output. This output signal will pulse HIGH once for each OTUk Multi-frame (or once each 256 OTUk fraeme
CI_SSF	Output	OTUk Characteristic Information - Server Signal Failure Output: The OTUk_CP interface will assert this signal anytime the OTSiG/OTUk-a_A_Sk function is declaring a service-affecting defect with the data that it is receiving via the AI_D input. The OTUk_CP Interface will assert this output signal, whenever the OTSiG/OTUk-a_A_Sk function is declaring any of the followiong defects. - dLOF - dLOM - dLOL - dLOFLANE (within any of the 4 or 20 logical lanes) - dLOS-P (within any of the four electrical lanes).
OTSiG/OTUk-a_A_Sk_MP Management Interface
MI_FECEn	Input	OTSiG/OTUk-a_A_Sk FEC Decoding Enable/Disable Input: This input pin permits the function user to either enable or disable FEC Decoding within the OTSiG/OTUk-a_A_Sk function. Setting this input HIGH enables FEC Decoding. Setting this input LOW disables FEC Decoding. NOTE: This input does not exist for OTU4 applications.
MI_1Second	Input	Management Interface - One Second Clock Input: The user is expeced to supply a clock signal, which has a frequency of 1Hz to this input. The Performance Monitoring portion of the OTSiG/OTUk-a_A_Sk function will use this clock signal as its timing reference for tallying and reporting the various One-Second Performance Monitoring parameters.
MI_cLOF	Output	Management Interface - Loss of Frame (Correlated) Output Indicator: This output pin indicates if the OTSiG/OTUk-a_A_Sk function is currently declaring the dLOF defect. If this output pin is LOW, then it indicates that the function is NOT currently declaring the dLOF defect condition. Conversely, if this output pin is HIGH, then it indicates that the function is currently declaring the dLOF defect condition. Please the blog post for dLOF defect, to learn more about how the OTSiG/OTUk-a_A_Sk function declares and clears the dLOF defect condition.
MI_cLOM	Output	Management Interface - Loss of Multiframe (Correlated) Output Indicator: This output pin indicates if the OSiG/OTUk-a_A_Sk function is currently declaring the dLOM defect condition. If this input pin is LOW, then it indicates that the function is NOT currently declaring the dLOM defect condition. Conversely, if this input pin is HIGH, then it indicates that this function is currently declaring the dLOM defect condition. Please see the dLOM blog post, for more information on how the OTSiG/OTUk-a_A_Sk function declares and clears the dLOM defect condition.
MI_cLOL	Output	Management Interface - Loss of Lane Alignment (Correlated) Output Indicator: This output pin ndicates if the OTSiG/OTUk-a_A_Sk function is currently declaring the dLOL defect. If this output pin is LOW, then it indicates that the function is NOT currently declaring the dLOL defect condition. Conversely, if this output pin is HIGH, then it indicates that the function is currently declaring the dLOL defect condition. Please see the dLOL blog post for more information on how the OTSiG/OTUk-a_A_Sk function declares and clears the dLOL defect condition.
MI_cLOS	Output	Management Interface - Loss of Signal (Correlated) Defect Output Indicator: This output indicates if the OTSiG/OTUk-a_A_Sk function is currently declaring the dLOS defect condition. If this output pin is LOW, then it indicates that the function is NOT currently declaring the dLOS defect condition. Conversely, if this output pin is HIGH, then it indicates that the function is currently declaring the dLOS defect condition. Please see the dLOS blog post, for more information on how the OTSiG/OTUk-a_A_Sk function declares and clears the dLOS defect condition.
MI_pFECcorrErr	Output	Management Interface - FEC Correlated Error Count Output: This output port reflects the number of symbol errors that the OTSiG/OTUk-a_A_Sk function (via the FEC Decoder) has corrected. This is a Performance Monitoring feature within the OTSiG/OTUk-a_A_Sk function. NOTE: This outputpin is INACTIVE if the MI_FECEn input pin is set LOW (to disable the FEC Decoder).

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What is the OTSiG/OTUk_A_So Function?

This blog post briefly describes the OTSiG/OTUk-a_A_So Atomic Function. The main purpose of this Atomic Function is to either convert an OTU3 data-stream into the OTL3.4 format, or to convert the OTU4 data-stream into the OTL4.10 or OTL4.4 format.

What is the OTSiG/OTUk_A_So Atomic Function?

The expression: OTSiG/OTUk_A_So is an abbreviation for the term: Optical Tributary Signal Group to OTUk Adaptation Source Function.

This blog post will briefly describe the OTSiG/OTUk_A_So set of atomic functions.

Changes in Terminology

However, the standards committee has recently decided to change the wording from using the term OPSM (Optical Physical Section Multilane) to using the word OTSiG (for Optical Tributary Signal Group).

For completeness, I will tell you that ITU-T G.709 defines the term OTSiG as:

“The set of OTSi signals that supports an OTU.”

Therefore, where we used the OTSi/OTUk_A_So and OTSi/OTUk_A_Sk functions for “single-lane” applications, we will use the OTSiG/OTUk_A_So and OTSiG/OTUk_A_Sk functions for “multi-lane” applications.

In summary, to “speak the same language,” as does the standard committee, we will call this atomic function the OTSiG/OTUk_A_So atomic function.

Likewise, in another post, we will now call (what we used to call the OPSM/OTUk_A_Sk function) the OTSiG/OTUk_A_Sk function.

I have created another post that provides documentation of the relationships between some old (now obsolete) terms and the new (and approved) ones that our standard committee is currently using.

A Little More about Multi-Lane Interfaces for OTU3 and OTU4 Applications

First, we only use the OTSiG/OTUk_A_So and OTSiG/OTUk_A_Sk functions for OTU3 and OTU4 Multi-Lane applications.

We will use the OTSiG/OTUk_A_So function for OTU3 applications to model circuitry that demultiplexes an OTU3 signal into a four-lane signal (e.g., an OTL3.4 signal). ITU-T G.709 defines the OTL3.4 signal as an approach to transporting OTU3 traffic over 4-lanes in parallel.

Likewise, we will use the OTSiG/OTUk_A_So function for OTU4 applications to model circuitry that demultiplexes (and multiplexes) an OTU4 signal into a four-lane signal (e.g., an OTL4.4 signal). ITU-T G.709 also defines the OTL4.4 signal as an approach to transporting OTU4 traffic over 4-lanes in parallel.

Please see the blog posts for the OTL3.4 and OTL4.4 Interfaces for more information on these topics.

The OTSiG/OTUk_A_So Function

The OTSiG/OTUk_A_So function is any circuit that takes an OTUk data-stream, clock, frame-start, and multi-frame start signals and:

converts this data into a combined, scrambled data stream, which (in some cases) contains a FEC (Forward-Error-Correction) field, and
demultiplexes this data into four electrical lanes, each of which can be readily converted into the optical format (at the output pins of this function).

Once again, ITU-T G.798 states that the system designer can use this function only for the OTU3 or OTU4 rates.

For OTU1 and OTU2 rates, we recommend that the system designer use the OTSi/OTUk_A_So function instead.

We discuss the OTSi/OTUk_A_So atomic function in another post.

Figure 1 presents a simple illustration of the OTSiG/OTUk_A_So function.

Figure 1, Simple Illustration of the OTSiG/OTUk_A_So function.

Table 1, List of Some Popular Versions for the OTSiG/OTUk_A_So function.

Function Name	Description	Comments
OTSiG/OTUk-a_A_So	OTSiG to OTUk Adaptation Source Function with ITU-T G.709 Standard FEC.	Can be used for OTU3 and OTU4 applications ONLY.
OTSiG/OTUk-b_A_So	OTSiG to OTUk Adaptation Source Function with No FEC	Can only be used for OTU3 Applications. Cannot be used for OTU4 applications.
OTSiG/OTUk-v_A_So	OTSiG to OTUk Adaptation Source Function with Vendor-Specific FEC	Can be used for OTU3 and OTU4 Applications. Not specified by ITU-T G.798.

Table 1 shows that the OTSiG/OTUk-a_A_So and the OTSiG/OTUk-v_A_So functions will compute and append some sort of FEC field to the back-end of each outbound OTUk frame.

However, this table also shows that the OTSiG/OTUk-b_A_So version does not generate the FEC field.

Consequently, ITU-T G.798 states that one can use the OTSiG/OTUk-a_A_So and OTSiG/OTUk-v_A_So functions for OTU3 and OTU4 applications. The standard also recommends that the user NOT use the OTSiG/OTUk-b_A_So function for OTU4 applications.

The OTU4 rate requires the use of Forward-Error-Correction.

What Version will we Discuss Throughout this Post?

Throughout this post, we will be discussing the OTSiG/OTUk-a_A_So version of this atomic function.

The OTSiG/OTUk-b_A_So and OTSiG/OTUk-v_A_So atomic functions do everything that the OTSiG/OTUk-a_A_So does, except that the -b version does NO FEC Encoding, and the -v version does FEC Encoding differently than what I describe here.

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So What All Does this Atomic Function Do?

The OTSiG/OTUk-a_A_So function will accept the OTUk data-stream, OTUk clock signal, frame-start signal, and multi-frame start signals via the CI_D, CI_CK, CI_FS, and CI_MFS inputs (of this function) respectively, and it will perform the following tasks.

It will insert the FAS and MFAS fields into the outbound OTUk data stream (coincident with whenever the upstream OTUk_TT_So function asserts the CI_FS and CI_MFS inputs, respectively).
This function will compute and append a FEC field to the back-end of each outbound OTUk frame.
It will scramble this “combined” OTUk data stream (consisting of the FAS, MFAS, and FEC fields).
Next, this function will demultiplex and combine this data stream into four parallel lanes of OTL3.4 traffic (for OTU3 applications) and OTL4.4 traffic (for OTU4 applications).
This function will transmit these four lanes to external Electrical-to-Optical Conversion circuitry (which will convert our OTL3.4 or OTL4.4 traffic into the optical format).

I illustrate a Unidirectional Connection that shows where the OTSiG/OTUk-a_a_So function “fits in” within a system below in Figure 2.

Figure 2, Illustration of an STE, transmitting an OTUk signal (over optical fiber) to another STE – the OTSiG/OTUk-a_A_So function is highlighted.

Figure 2 shows that the OTSiG/OTUk-a_A_So function will accept traffic from the upstream OTUk_TT_So function. The OTSiG/OTUk-a_A_So function will then perform additional processing on this data before it sends it over to optical circuitry for conversion and transport.

We will discuss this additional processing below.

Functional Description of this Atomic Function

Let’s take a closer look at this function now.

The OTSiG/OTUk-a_A_So functional blocks are different for OTU3 applications than for OTU4 applications. Therefore, we will first walk through the Functional Block Diagram for OTU3 applications.

Afterward, we will do the same for OTU4 applications.

Review of the OTSiG/OTU3-a_A_So Functional Block Diagram – OTU3 Applications

Figure 3 presents the Functional Block Diagram of the OTSiG/OTUk-a_A_So Atomic Function for OTU3 Applications.

Figure 3, Illustration of the Functional Block Diagram of the OTSiG/OTU3-a_A_So Atomic Function (for OTU3 Applications).

Hence, Figure 3 shows that the OTU3-version of this function contains the following functional blocks.

FAS/MFAS Insertion Block
FEC Encoder Block
Scrambler Block
16-Byte Block Distributor and Rotator Block

I will briefly discuss each of these functional blocks below.

The FAS/MFAS Insertion Block

The FAS/MFAS Insertion Block is the first block the OTU3 signal will pass through after entering this atomic function. I illustrate the OTSiG/OTU3-a_A_So function with the FAS/MFAS Insertion block highlighted below in Figure 4.

Figure 4, Illustration of the OTSiG/OTU3-a_A_So Functional Block Diagram with the FAS/MFAS Insertion Block highlighted.

The FAS/MFAS Insertion block will insert the FAS and MFAS fields into the outbound OTU3 data stream each time the upstream OTUk_TT_So function asserts the CI_FS input pin.

Likewise, the FAS/MFAS Insertion block will initialize the MFAS byte-field to 0x00 within the outbound OTU3 data stream each time the upstream OTUk_TT_So function asserts the CI_MFS input pin.

The FAS/MFAS Insertion block will proceed to increment the contents of the MFAS field within each OTU3 frame it generates.

The FEC Encoder Block

Once the OTU3 signal leaves the FAS/MFAS Insertion block, it will pass through the FEC Encoder block. I show an illustration of the OTSiG/OTU3-a_A_So Functional Block Diagram, with the FEC Encoder Block Highlighted below in Figure 5.

Figure 5, Illustration of the OTSiG/OTU3-a_A_So Functional Block Diagram with the FEC Encoder block highlighted.

The FEC Encoder block will compute the FEC field and append this field to the back-end of each outbound OTU3 frame.

ITU-T G.709 recommends that (for a Fully-Compliant OTUk Frame), one uses the Reed Solomon RS(255,239) Code for its Forward-Error-Correction scheme.

The standard also recommends that the System Designer use Symbol-Interleaving and that the user place the resulting FEC code into a 4-row x 256-byte column field at the back-end of each outbound OTUk frame.

I show the location (that the FEC Encoder block should insert the FEC Code) within the OTUk frame below in Figure 6.

Figure 6, Illustration of the OTUk Frame, with the Location of the FEC-field highlighted

I discuss this Forward-Error-Correction scheme in much greater detail in another post.

Once this OTU3 data stream leaves the FEC Encoder block, it will proceed to the Scrambler block for further processing.

The Scrambler Block

I illustrate the OTSiG/OTU3-a_A_So Functional Block Diagram with the Scrambler Block highlighted below in Figure 7.

Figure 7, Illustration of the OTSiG/OTU3-a_A_So Functional Block Diagram with the Scrambler Block highlighted.

ITU-T G.709 requires that we scramble OTUk data before we transmit it over optical fiber.

The standard requires that we do this to ensure that this OTUk signal has sufficient bit-timing content for Clock and Data Recovery PLLs (Phase-Locked Loops) within the Sink STE (at the remote end).

ITU-T G.709 also states that the Scrambler must operate as a frame synchronous scrambler of sequence length 65,535 (e.g., 2¹⁶-1), running at the OTUk rate.

Finally, ITU-T G.709 states that the Scrambler must use the generating polynomial of 1 + x + x³ + x¹² + x¹⁶.

I show a simple diagram of how the user can implement the Scrambler within their OTSiG/OTUk-a_A_So function design below in Figure 8.

Figure 8, Illustration of the High-Level Block Diagram for the Frame-Synchronous Scrambler

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16-Byte Block Distributor and Rotator Block

Once the OTU3 signal leaves the Scrambler block, it will pass through the 16-Byte Block Distributor and Rotator Block. I illustrate the OTSiG/OTU3-a_A_So Functional Block Diagram with the 16-Byte Block Distributor and Rotator Block highlighted below in Figure 9.

Figure 9, Illustration of the OTSiG/OTU3-a_A_So Functional Block Diagram with the 16-Byte Block Distributor and Rotator Block highlighted.

The 16-Byte Block Distributor and Rotator block will convert a composite OTU3 signal (that is of the form of a single serial data stream) into the OTL3.4 format (over four lanes) that we describe in the OTL3.4 post.

In this case, the OTSiG/OTU3-a_A_So function has four outputs (one output for each of the four OTL3.4 lanes), which we labeled AI_PLD[1] through AI_PLD[4] in Figure 9.

The user is expected to connect these four output signals to optical circuitry (that will convert this electrical data into the optical format).

We have briefly covered the OTSiG/OTUk-a_A_So function block for OTU3 applications. Let’s move on and discuss this atomic function for OTU4 applications.

Review of the OTSiG/OTU4-a_A_So Functional Block Diagram – OTU4 Applications

I present the Functional Block Diagram of the OTSiG/OTUk-a_A_So Atomic Function for OTU4 Applications below in Figure 10.

Figure 10, Illustration of the Functional Block Diagram of the OTSiG/OTU4-a_A_So Atomic Function (for OTU4 Applications)

Hence, Figure 4 shows that the OTU4 version of this function contains the following functional blocks.

FAS/MFAS Insertion Block
FEC Encoder Block
Scrambler Block
LLM (Logical Lane Marker) Insertion Block
16 Byte Block Distributor and Rotator Block

The FAS/MFAS Insertion Block

Please see the description for the FAS/MFAS Insertion Block above for OTU3 applications.

The FEC Encoder Block

Please see the description for the FEC Encoder Block above for OTU3 applications.

The Scrambler Block

Please see the description for the Scrambler Block above for OTU3 applications.

The LLM (Logical Lane Marker) Insertion Block

Once the OTU4 signal passes through and leaves the Scrambler block, it will pass through the LLM Insertion block.

I show an illustration of the OTSiG/OTU4-a_A_So Functional Block Diagram with the LLM Insertion Block Highlighted below in Figure 11.

Figure 11, Illustration of the OTSiG/OTU4-a_A_So Functional Block Diagram, with the LLM Insertion Block highlighted.

Two things happen at the LLM Insertion Block.

We start the process of demultiplexing the OTU4 data stream into 20 logical lanes, and
We identify these Logical Lanes by inserting the appropriate LLM value into each of these 20 logical lanes (or data streams).

If you recall from the OTL4.4 blog post, whenever we encode an OTU4 signal into the OTL4.4 format, we will borrow the 3rd OA2 byte-field (within the FAS field) and use it as the Logical Lane Marker.

I show an illustration of the OTUk Framing Format, with this particular FAS byte highlighted below in Figure 12.

Figure 12, Illustration of the OTUk Framing Format, with the 3rd OA2 Byte-field (that we use for the LLM – for OTL4.4 applications) highlighted.

The purpose of the LLM Insertion Block is to insert a value into this “borrowed FAS-byte field” that ranges in value from 0 to 239. This value (that we insert into this LLM field) functions as the Logical Lane ID for each of the 20 Logical Lanes.

Please see the OTL4.4 Blog Post for more information on the assignment of these Logical Lane IDs.

The 16-Byte Block Distributor and Rotator Block

Once the OTU4 signal exits the LLM Insertion Block, it will pass through the 16-Byte Block Distributor and Rotator Block.

I illustrate the OTSiG/OTU4-a_A_So functional block diagram with the 16-Byte Block Distributor and Rotator block highlighted below in Figure 13.

Figure 13, Illustration of the OTSiG/OTU4-a_A_So Functional Block Diagram with the 16-Byte Block Distributor and Rotator Block highlighted.

The 16-Byte Block Distributor and Rotator Block will work with the LLM Insertion Block to demultiplex a serial OTU4 data stream into 20 logical lane signals.

Please see the OTL4.4 post for most information about the 16-Byte Block Distributor and Rotator block.

This block will then route these 20 logical lanes (with their LLM ID included) downstream towards their 5:1 Bit-Wise Multiplexers.

The 5:1 Bit-Wise Multiplexers

After the LLM Insertion and 16-Byte Distributor and Rotator blocks have demultiplexed the single OTU4 signal into 20 Logical Lane signals, these blocks will send these 20 Logical Lane signals to a set of four 5:1 Bit-Wise Multiplexers.

I illustrate the OTSiG/OTU4-a_A_So Functional Block Diagram with a set of four 5:1 Bit-Wise Multiplexers highlighted below in Figure 14.

Figure 14, Illustration of the OTSiG/OTU4-a_A_So Functional Block Diagram, with a set of four 5:1 Bit-Wise Multiplexers highlighted

The OTSiG/OTU4-a_A_So function will route each of the 20 Logical Lane signals to one of four 5:1 Bit-Wise Multiplexers. Each of these 5:1 Bit-Wise Multiplexers will accept 5 Logical Lane signals. These Bit-Wise Multiplexers will then bit-wise multiplex these five signals into a single electrical lane.

Therefore, since we are applying 20 Logical Lane signals to these four 5:1 Bit-Wise Multiplexers, we will combine these 20 Logical Lane signals into four electrical lane signals. These bit-wise multiplexed 4-lane signals are our OTL4.4 signal that we can route to the nearby optical circuitry.

The OTSiG/OTU4-a_A_So function will output these four electrical signals to optical circuitry via the AI_PLD[1] through AI_PLD[4] output signals.

Function Defects

This function does not declare any defect conditions.

Function Consequent Equations

This function does not have any Consequent Action (or Equations).

Pin Description of the OTSiG/OTUk-a_A_So Function

Table 2 presents a list and description of each of the Input and Output pins of the OTSiG/OTUk-a_A_So Function.

Table 2, Pin Description of the OTSiG/OTUk-a_A_So Atomic Function

Signal Name	Type	Description
OTUk_CP Interface
CI_D	Input	OTUk Characteristic Information - OTUk Data Input: The OTSiG/OTUk-a_A_So function will accept this OTU3 or OTU4 data-stream from the upstream OTUk_TT_So function. The OTSiG/OTUk-a_A_So atomic function will then convert this single OTU3 or OTU4 data-stream into the OTL3.4 or OTL4.4 format, respectively. This OTUk data-stream will NOT include the FAS, MFAS or FEC fields. This particular function will compute and append the FEC field to the back-end of each outbound OTU3/4 frame. This function will also use the CI_FS and CI_MFS signal to insert the FAS and MFAS fields into this single OTU3/4 data-stream, all prior to demultiplexing this OTU3/4 data-stream into 4 lanes of traffic.
CI_CK	Input	OTUk Characteristic Information - Clock Input: The OTSiG/OTUk-a_A_So function will sample all data and signals (at the OTUk_CP Interface) upon one of the edges of this input clock signal. This statement applies to the CI_D, CI_FS and CI_MFS input signals. This clock signal will also function as the timing source for this function as well.
CI_FS	Input	OTUk Characteristic Information - Frame Start Output: The upstream OTUk_TT_So function will drive this output pin HIGH whenever that function outputs the very first bit (or byte) of a new OTUk frame, via the CI_D input. The OTUk_TT_So function should only pulse this output pin HIGH once for each incoming OTUk frame. The OTSiG/OTUk-a_A_So function will use this input signal to determine where it should denote the boundary of each OTUk frame and insert the FAS, MFAS and FEC fields into the serial OTUk data-stream, prior to it demultiplexing this data-stream into 4 electrical lanes of traffic.
CI_MFS	Input	OTUk Characteristic Information - Multi-Frame Start Input: The upstream OTUk_TT_So function will drive this output pin HIGH whenever it applies the very first bit (or byte) of a new OTUk multiframe to the CI_D input. The upstream OTUk_TT_So function will drive this output pin HIGH once for each OTUk multi-frame. The OTSiG/OTUk-a_A_So function will use this input to determine, at which OTUk frame, it should initialize the MFAS byte-field to 0x00 (to denote the start of a new Multi-Frame).
OTSi_AP Interface
A_PLD[1]	Output	OTL3.4 or OTL4.4 Electrical Output - Lane 1: After the OTSiG/OTUk-a_A_So function computes and inserts the FEC and also includes the FAS and MFAS fields, it will demultiplex that composite OTU3/OTU4 data-stream into either the OTL3.4 or OTL4.4 format. This particular output is Lane 1 for this 4-Lane Electrical Interface.
A_PLD[2]	Output	OTL3.4 or OTL4.4 Electrical Output - Lane 2: Please see the description for AI_PLD[1].
A_PLD[3]	Output	OTL3.4 or OTL4.4 Electrical Output - Lane 3: Please see the description of AI_PLD[3].
A_PLD[4]	Output	OTL3.4 or OTL4.4 Electrical Output - Lane 4: Please see the description of AI_PLD[1].

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What is Defect Correlation?

This post briefly defines and explains what Defect Correlation means. In short, the Defect Correlation equations will specify how we expect a system to respond to a specific defect condition.

What is Defect Correlation, and How Should You Interpret It?

The purpose of this blog post is two-fold.

To describe the concept of Defect Correlation and
To discuss how to interpret the meaning of Defect Correlation and their Equations.

Introduction

Numerous ITU Standards (such as ITU-T G.798 for OTN applications) will define various aspects of defects. These standards will define a defect, such as dLOS (the Loss of Signal) and dLOF (the Loss of Frame).

These standards will (sometimes) describe the conditions that an OTN Network Element (be it an STE or PTE) should use to declare or clear a given defect.

For instance, ITU-T G.798 specifies all of the following defects that an OTN STE can declare and clear.

dLOS-P – Loss of Signal Defect-Path
dLOFLANE[j] – Loss of Frame of Logical Lane, for Logical Lane j
dLOL – Loss of Lane Alignment Defect
dAIS – Alarm Indication Signal Defect (e.g., OTUk-AIS for STEs)
dLOF – Loss of Frame Defect
dLOM – Loss of Multi-Frame Defect
dTIM – Trail Trace Identifier Mismatch Defect(*)
dIAE – Input Alignment Error Defect(*)
dBIAE – Backward Input Alignment Error Defect(*)
dBDI – Backward Defect Indicator Defect
dDEG – Signal Degrade Defect(*)

(*) – Requires membership to THE BEST DARN OTN TRAINING PRESENTATION…PERIOD!!! to see these links.

And it is excellent that the ITU-T standard committee does this for us.

But let’s now take a closer look at these defects from a System-Level standpoint.

Should One Defect Lead to Many Other Defects?

Suppose an OTN STE declares the dLOS-P (Loss of Signal-Path) defect condition with its incoming optical lanes or signal.

This STE will declare the dLOS-P condition for one of two reasons.

Because the optical components (upstream) are detecting too little optical signal energy (within the incoming signal) or
the Clock and Data Recovery circuitry (within the STE electronics) is detecting an absence of recovered (data) signal activity for an extended period.

In Figure 1, I illustrate the OTSi/OTUk-a_A_Sk function, declaring the dLOS-P defect.

Figure 1, The OTSi/OTUk-a_A_Sk Atomic Function, declares the dLOS Defect Condition.

In either of these cases, it is clear that this OTN STE should declare the dLOS-P defect condition.

How about the dLOF Condition?

However, if that same OTN STE is not receiving any discernable signal from the remote STE, it is safe to say that it will not be receiving the FAS fields (within this now non-existent incoming data stream).

Should this OTN STE also declare the dLOF defect as well?

In Figure 2, I illustrate the OTSi/OTUk-a_A_Sk function, declaring the dLOF defect condition and the dLOS-P defect condition.

Figure 2, The OTSi/OTUk-a_A_Sk function declaring the dLOF and dLOS-P Defect Conditions

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What about the dLOM Condition?

And since the OTN STE is not receiving any FAS field bytes, it cannot locate the MFAS bytes.

Should this OTN STE also declare the dLOM defect too?

In Figure 3, I illustrate the OTSi/OTUk-a_A_Sk function, declaring the dLOM, dLOF, and dLOS-P Defect conditions.

Figure 3, The OTSi/OTUk-a_A_Sk Atomic Function declaring the dLOM, dLOF, and dLOS-P Defect Conditions

How about the dTIM Condition?

Finally, since our OTN STE is not receiving any discernable signal (from the remote STE), and it cannot locate the boundaries of each incoming OTUk frame, it will certainly not obtain a Trail Trace Identification Message that matches that of the “Expected Trail Trace Identification” Message.

Should this OTN STE also declare the dTIM defect as well?

In Figure 4, I illustrate the OTUk_TT_Sk function declaring the dTIM defect, while the upstream OTSi/OTUk-a_A_Sk function reports the dLOS-P, dLOF, and dLOM defect conditions.

Figure 4, The OTUk_TT_Sk Atomic Function (downstream from the OTSi/OTUk-a_A_Sk Function) declares the dTIM defect.

Many Defects, all due to the dLOS-P Condition

In this scenario, a Loss of Signal event would cause the OTN STE to declare the dLOS, dLOF, dLOM, and dTIM defect conditions.

The OTN STE will accurately declare all four defect conditions because conditions warrant that the STE declare each of these defects.

However, allowing an STE to declare multiple defects (e.g., dLOS, dLOF, dLOM, and dTIM) can be confusing to both System-Management and the System Operator.

I could take this exercise even further and include some of the PTE/ODUk-related defects that an OTN PTE would declare (e.g., ODUk-AIS), all because of the dLOS-P condition. But I think that you get my point.

Whenever a service-affecting defect occurs, the OTN STE needs to alert System Management of a concise description of the problem (just dLOS-P in this case).

The intent should be to help the System Operator isolate the root cause of these problems.

We should not be bombarding the System Operator with a whole slew of defects, which are just artifacts of a single defect.

If the OTN STE declares the dTIM, dLOM, dLOF, and dLOS-P defects, the root cause of this problem has nothing to do with a mismatch in the Trail-Trace Identification Message.

Hence the Purpose of Defect Correlation

The purpose of Defect Correlation and Defect Correlation equations is to establish and report ONLY the root cause of problems to System Management.

The Defect Correlation Equations accomplishes this by creating a hierarchy of defects.

I’ll explain this.

Let’s list some Defect Correlation Equations for the OTSi/OTUk_A_Sk and OTUk_TT_Sk Atomic Functions.

For the OTSi/OTUk_A_Sk Atomic Function

The OTSi/OTUk_A_Sk function has the following Defect Correlation equations:

cLOS-P ⇐ dLOS-P and (NOT AI_TSF-P)
cLOF ⇐ dLOF and (NOT dLOS-P) and (NOT dAIS) and (NOT AI_TSF-P)
cLOM ⇐ dLOM and (NOT dLOS-P) and (NOT dLOF) and (NOT dAIS) and (NOT AI_TSF-P)

Let’s also include the following Consequent Equation to bridge the OTUk_TT_Sk function to the OTSi/OTUk_A_Sk function.

aSSF ⇐ dLOS-P or dAIS or dLOF or dLOM or AI_TSF-P

For the OTUk_TT_Sk Function

In this case, we will focus on the Defect Correlation equation that pertains to the dTIM defect condition.

cTIM ⇐ dTIM and (NOT CI_SSF) and (NOT dAIS)

So Now Let’s Study some of these Defect Correlation Equations

Let’s start with the first equation for the OTSi/OTUk-a_A_Sk function.

cLOS-P ⇐ dLOS-P and (NOT AI_TSF-P)

Where:

cLOS-P is the correlated defect value of the dLOS-P defect state.

dLOS-P is the current state of the dLOS-P defect condition that the OTSi/OTUk_A_Sk function will declare or clear.

AI_TSF-P is the current state of the AI_TSF-P (Trail Signal Fail – Path Indicator) Input to the OTSi/OTUk-A_Sk function.

In this equation, the parameter that begins with the letter “c” is the correlated defect parameter (or defect) state that we ultimately report to System Management.

This equation states that we should only set the variable cLOS-P to TRUE if dLOS-P is TRUE.

In other words, we should only report the Loss of Signal condition (e.g., setting cLOS-P to TRUE) if the STE circuitry declares the dLOS-P defect (due to a lack of signal activity within the Clock Recovery Block, for example).

This equation also states that we should NOT set cLOS-P to TRUE because the upstream Optical Circuitry is declaring some other defect condition and is then asserting its AI_TSF-P output – towards the OTSi/OTUk_A_Sk function).

I show a TRUTH TABLE for this Defect Correlation Equation below in Table 1.

Table 1, TRUTH TABLE for the Defect Correlation Equation, cLOS-P ⇐ dLOS-P AND (NOT AI_TSF-P)

dLOS-P Defect	AI_TSF-P State	cLOS-P State	Comment
Cleared	FALSE	0
Declared	FALSE	1	Sets cLOS-P to TRUE, because dLOS-P is declared.
Don't Care	TRUE	0	We set cLOS-P to 0 when AI_TSF-P is TRUE.

Let’s look at another Defect Correlation Equation.

cLOF ⇐ dLOF and (NOT dLOS-P) and (NOT dAIS) and (NOT AI_TSF-P)

Where:

cLOF is the correlated value of the dLOF defect state.

dAIS is the current state of the dAIS defect condition within the OTSi/OTUk_A_Sk function.

In this equation, we are stating that we should only set cLOF = TRUE (and report the Loss of Frame condition to System Management) if the STE circuitry declares the dLOF condition.

This equation also states that we should NOT be setting cLOF = TRUE (and report the Loss of Frame Condition to System Management) if:

The STE is also declaring the dLOS-P defect, or
declaring the dAIS (OTUk-AIS) defect, or
If the upstream Optical Components assert the AI_TSF-P input to the OTSi/OTUk_A_Sk function.

If any of the three items (above) are TRUE, then we must set cLOF = FALSE.

I show the TRUTH TABLE for this Defect Correlation Equation below in Table 2.

Table 2, The TRUTH TABLE for the Defect Correlation Equation, cLOF ⇐ dLOF AND (NOT dLOS-P) AND (NOT dAIS) AND (NOT AI_TSF-P)

dLOF Defect Condition	dLOS-P Defect Condition	dAIS Defect Condition	AI_TSF-P State	cLOF State	Comments
Cleared	Cleared	Cleared	FALSE	Cleared
Declared	Cleared	Cleared	FALSE	Declared	We assert cLOF because we are declaring the dLOF Defect
Don't Care	Declared	Cleared	FALSE	Cleared	We set cLOF = 0 whenever dLOS-P is declared.
Don't Care	Cleared	Declared	FALSE	Cleared	We set cLOF = 0 whenever dAIS is declared.
Don't Care	Cleared	Cleared	TRUE	Cleared	We set cLOF = 0 whenever AI_TSF-P is driven TRUE.

At the risk of “whipping a dead horse,” I will show one more example.

cTIM ⇐ dTIM and (NOT CI_SSF) and (NOT dAIS)

Where:

cTIM is the correlated value of the dTIM defect state.

CI_SSF is the current state of the CI_SSF (Server Signal Fail Indicator) input pin to the OTUk_TT_Sk function.

If the STE circuitry declares this defect, this equation states that we must only report the Trail Trace Identifier Mismatch Defect (and set cTIM = TRUE).

This equation also states that we MUST NOT set cTIM = TRUE if any of the following is true.

The OTUk_TT_Sk function is declaring the dAIS defect condition, or
If the upstream OTSi/OTUk_A_Sk function is asserting the CI_SSF input to the OTUk_TT_Sk function.

NOTE: We have the following Consequent Equation for the CI_SSF signal (from the OTSi/OTUk_A_Sk function).

aSSF <- dLOS-P or dAIS or dLOF or dLOM or AI_TSF-P

This equation states that if the upstream OTSi/OTUk_A_Sk function declares any of the following defects, it will set aSSF = TRUE.

dLOS-P
dAIS (OTUk-AIS)
dLOF
dLOM, or
If the upstream Optical Components assert the AI_TSF-P input to the OTSi/OTUk_A_Sk function.

If aSSF = TRUE, then the OTSi/OTUk_A_Sk function will assert the CI_SSF output signal (towards the OTUk_TT_Sk function).

Finally, we get to the bottom line.

These equations state that the STE MUST NOT set cTIM = TRUE (and MUST NOT report the Trail Trace Identifier Mismatch defect to System Management) if any of the following defect conditions are TRUE.

dLOS-P
dAIS
dLOF
dLOM
If the AI_TSF-P signal (from the upstream Optical Components) is HIGH.

Summary

I believe that you can see that using Defect Correlation Equations makes Defect Reporting and System-Management MUCH EASIER.

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What is the OTSi/OTUk_A_Sk Function?

This blog post briefly describes the OTSi/OTUk_A_Sk (OTSi to OTUk Adaptation Sink) Atomic Function. This post also describes how this atomic function declares and clears the dLOF, dLOM, and dAIS defects.

What is the OTSi/OTUk_A_Sk Atomic Function?

The expression: OTSi/OTUk_A_Sk is an abbreviation for the term: Optical Tributary Signal to OTUk Adaptation Sink Function.

This blog post will briefly describe the OTSi/OTUk_A_Sk set of atomic functions.

We discuss the OTSi/OTUk_A_Sk Atomic Function in detail in Lesson 9, within THE BEST DARN OTN TRAINING PRESENTATION…PERIOD!!!

Changes in Terminology

However, the standards committee has recently decided to change the wording from using the term OCh (for Optical Channel) to OTSi (for Optical Tributary Signal).

For completeness, I will tell you that ITU-T G.959.1 defines the term OTSi as:

“Optical signal that is placed within a network media channel for transport across the optical network. This may consist of a single modulated optical carrier or a group of modulated optical carriers or subcarriers”.

Hence, to “speak the same language” as the standard committee, we will call this atomic function the OTSi/OTUk_A_Sk atomic function.

Likewise, in another post, we will now call (what we used to call the OCh/OTUk_A_So function) the OTSi/OTUk_A_So function.

I have created another post that provides documentation of the relationships between some old (now obsolete) terms and the new (and approved) ones that our standard committee is currently using.

The OTSi/OTUk_A_Sk Function

The OTSi/OTUk_A_Sk function is any circuit that takes an OTSi electrical signal and converts this data back into the OTUk signal.

More specifically, the System-Designer will apply an OTSi signal (which will be a fully-framed and scrambled OTUk electrical signal that often includes Forward-Error-Correction) to the OTSi_AP input interface.

This function will convert this signal into OTUk data, clock, frame start, and multi-frame start signals.

This function will also decode the Forward-Error-Correction field (if available) and output these signals to downstream circuitry (such as the OTUk_TT_Sk function).

ITU-T G.798 states that the system designer can use this function for all OTUk rates (e.g., from OTU1 through OTU4).

However, in most cases, we will typically use the OTSi/OTUk_A_Sk function for OTU1 and OTU2 applications. We will usually use the OTSiG/OTUk_A_Sk atomic function for OTU3 and OTU4 applications.

We discuss the OTSiG/OTUk_A_Sk atomic function in another post.

Figure 1 presents a simple illustration of the OTSi/OTUk_A_Sk function.

Figure 1, Simple Illustration of the OTSi/OTUk_A_Sk function

ITU-T G.798 defines three versions of this particular function. I have listed these versions below in Table 1.

Table 1, List of the ITU-T G.798 -specified Versions for the OTSi/OTUk_A_Sk functions

Function Name	Description	Comments
OTSi/OTUk-a_A_Sk	OTSi to OTUk Adaptation Sink Function with ITU-T G.709 Standard FEC	Can be used for OTU1 through OTU4 applications.
OTSi/OTUk-b_A_Sk	OTSi to OTUk Adaptation Sink Function with No FEC	Cannot be used for OTU4 applications
OTSi/OTUk-v_A_Sk	OTSi to OTUk Adaptation Sink Function with Vendor-Specific FEC	Can be used for OTU1 through OTU4 applications.

Table 1 shows that the OTSi/OTUk-a_A_Sk and the OTSi/OTUk-v_A_Sk functions will compute and decode some sort of FEC field within the backend of each incoming OTUk frame.

However, this table also shows that the OTSi/OTUk-b_A_Sk version does not support FEC decoding.

Therefore, ITU-T G.798 states that one can use the OTSi/OTUk-a_A_Sk and OTSi/OTUk-v_A_Sk functions for OTU1 through OTU4 applications. Further, the standard recommends that the user NOT use the OTSi/OTUk-b_A_Sk function for OTU4 applications.

Network Terminals operating at the OTU4 rate are required to use Forward-Error-Correction.

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What Version (of the OTSi/OTUk_A_Sk function) will we Discuss Throughout this Post?

Throughout this post, we will be discussing the OTSi/OTUk-a_A_Sk version of this atomic function.

The OTSi/OTUk-b_A_Sk and OTSi/OTUk-v_A_Sk atomic functions do everything that the OTSi/OTUk-a_A_So does, except that the -b version does NO FEC Decoding and the -v version does FEC Decoding differently than what I describe here.

So What All Does this Atomic Function Do?

The OTSi/OTUk-a_A_Sk function will accept an OTSi data stream from the upstream Optical-to-Electrical Conversion circuitry. This function will perform the following tasks on this incoming data stream.

Descrambling – It will descramble this incoming data stream.
FEC Decoding – The function will decode the FEC field (within the backend of each incoming OTUk frame) and detect and correct most symbol errors within this data stream.
Extract the Frame-Start and Multi-Frame Start signals from this incoming data stream.
Detect and Flag the following service-affecting defect conditions
- dLOS-P – Loss of Signal – Path
- dAIS – Alarm Indication Signal (OTUk-AIS)
- dLOF – Loss of Frame
- dLOM – Loss of Multiframe
Assert the CI_SSF (Server Signal Fail Indicator) output signal (towards the downstream OTUk_TT_Sk function) anytime it declares any service-affecting defect conditions.
Output the remaining OTUk data stream, the OTUk clock signal, the Frame-Start, and Multi-Frame Start signals to downstream circuitry (e.g., typically the OTUk_TT_Sk atomic function).

Figure 2 illustrates a Unidirectional Connection where the OTSi/OTUk-a_A_Sk function “fits in” a system.

Figure 2, Illustration of an STE, transmitting an OTUk signal (over optical fiber) to another STE – the OTSi/OTUk-a_A_Sk function is highlighted.

Functional Description of this Atomic Function

Let’s now take a closer look at this function.

Figure 3 presents the Functional Block Diagram of the OTSi/OTUk-a_A_Sk Atomic Function.

Figure 3, Illustration of the Functional Block Diagram of the OTSi/OTUk-a_A_Sk Atomic Function

Therefore, Figure 3 shows that this function contains the following functional blocks

Clock Recovery and dLOS Detection Blocks
dAIS Detection Block
Frame Alignment and dLOF Detection Blocks
Descrambler Block
FEC Decoder Block
Multi-Frame Alignment and dLOM Detection Blocks
Consequent Actions Block

I will briefly discuss each of these functional blocks below.

The Clock Recovery and dLOS (Loss of Signal Defect) Detection Blocks

The Clock Recovery block is responsible for recovering the clock signal and data content within the incoming OTSi signal via the AI_PLD input pin.

To that end, I illustrate the OTSi/OTUk-a_A_Sk Functional Block Diagram with the Clock Recovery and dLOS Detection Blocks highlighted below in Figure 4.

Figure 4, Illustration of the OTSi/OTUk-a_A_Sk Functional Block Diagram, with the Clock Recovery and dLOS Detection Blocks highlighted.

Since the OTSi/OTUk-a_A_So atomic function (within the remote STE) should have scrambled this data stream, there should always be good timing content (or transitions) within the incoming OTSi signal so that this Clock Recovery block can acquire and extract out both a recovered clock signal and data-stream.

Suppose the Clock Recovery and dLOS Detection blocks determine a lengthy absence in signal transitions (within the incoming OTSi data-stream). It will declare the dLOS-P (Loss of Signal-Path) defect condition in that case.

Please check out the dLOS blog post for more information about the dLOS-P defect condition.

The OTSi/OTUk-a_A_Sk function will route this recovered clock and data signal to the dAIS Detector and Frame Alignment blocks for further processing.

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The dAIS (Alarm Indication State Defect) Detector Block

As the newly recovered clock and data signal travel to the Frame Alignment block, the dAIS Detector block will also parse through this data stream to see if it should declare or clear the dAIS (Alarm Indication Signal Defect) condition or not.

To make things more convenient, I present an illustration of the OTSi/OTUk-a_A_Sk Functional Block Diagram, with the AIS Detector block highlighted below in Figure 5.

Figure 5, Illustration of the OTSi/OTUk-a_A_Sk Functional Block Diagram, with the AIS Detector block highlighted.

In this case, the dAIS Detector block will check to see if the incoming data stream matches an OTUk-AIS maintenance signal.

ITU-T G.709 further states that the OTUk-AIS maintenance signal is an unframed PN-11 repeating pattern.

The standard defines the PN-11 sequence by the generating polynomial of 1 + x⁹ + x¹¹.

Please see the blog post on the OTUk-AIS Maintenance signal for more information about this type of signal.

Additionally, please see the dAIS post for more information on how the AIS Detection circuit declares and clears the dAIS defect condition.

The Frame Alignment and dLOF (Loss of Frame Defect) Detection Blocks

As long as the dAIS Detector block is NOT declaring the dAIS defect condition, then the Frame Alignment block will process the incoming recovered block and data stream.

To make things more convenient for you, I present an illustration of the OTSi/OTUk-a_A_Sk Functional Block Diagram. This block diagram highlights the Frame Alignment and dLOF Detection below in Figure 6.

Figure 6, Illustration of the OTSi/OTUk-a_A_Sk Functional Block Diagram with the Frame Alignment and dLOF Detection circuitry highlighted.

The incoming recovered data stream should be a full, scrambled OTUk frame. However, the FAS field (e.g., the three OA1 and OA2 byte fields) should NOT be scrambled.

The Frame Alignment block will parse through the FAS fields within the incoming OTUk data stream. This block and the dLOF (Loss of Frame) Detection Block will declare and clear the dLOF defect as appropriate.

Please see the blog post on the dLOF defect for more information about how the Frame Alignment and dLOF Detection blocks declare and clear the dLOF defect condition.

Descrambler Block

In the OTSi/OTUk-a_A_So blog post, we mentioned that the OTSi/OTUk-a_A_So function would scramble the content of each OTUk frame.

That function will scramble all bytes (within each OTUk frame) except for the FAS fields. This function will even scramble the MFAS field as well.

The purpose of the Descrambler block is to restore the content of each OTUk frame to its original state before being scrambled at the remote STE.

To that end, I illustrate the OTSi/OTUk-a_A_Sk Functional Block Diagram with the Descrambler block highlighted below in Figure 7.

Figure 7, Illustration of the OTSi/OTUk-a_A_Sk Functional Block Diagram, with the Descrambler block highlighted.

In the OTSi/OTUk-a_A_So function, we scrambled the contents of each OTUk frame, using the polynomial generating equation of 1 + x + x³ + x¹² + x¹⁶.

Therefore, the Descrambler block (within this function) will descramble the incoming OTUk data-stream (again) using the polynomial generating equation of 1 + x + x³ + x¹² + x¹⁶.

I show a simple diagram of how one can implement the Descrambler within their OTSi/OTUk-a_A_Sk function design below in Figure 8.

Figure 8, High-Level Block Diagram of the Frame Synchronous Descrambler

I discuss the Descrambler function and requirements in greater detail in another post.

Next, the OTUk signal will proceed to the FEC Decoder block for further processing.

FEC (Forward-Error-Correction) Decoder Block

The OTSi/OTUk-a_A_So function (at the remote STE) is responsible for performing FEC (Forward Error Correction) Encoding.

This means that this function computed a FEC Code and inserted that code into a 4-row x 128-byte column field at the backend of each OTUk frame, as shown below in Figure 9.

Figure 9, Illustration of the OTUk Frame Format with the FEC Field Highlighted

The purpose of the FEC Decoder (within the OTSi/OTUk-a_A_Sk function) is to parse through the incoming OTUk data stream and (by using the contents of the FEC-field) detect and correct most symbols errors within this data stream.

The FEC Decoder block will tally any occurrences of Symbol errors (within the incoming OTUk data stream). It will report this information to System Management via the MI_pFECcorrErr output (via the OTSi/OTUk-a_A_Sk_MP Interface).

I discuss this Forward-Error-Correction scheme in much greater detail in another post.

Multi-Frame Alignment and dLOM (Loss of Multi-Frame Defect) Detection Blocks

Once the incoming OTUk data stream passes through the FEC Decoder block, the OTSi/OTUk-a_A_Sk function will route this signal to the Multi-Frame Alignment and dLOM Detection blocks.

The Multi-Frame Alignment block will parse through and check the contents of the MFAS field within the incoming OTUk data stream. The Multi-Frame Alignment block will check the contents of this data stream to see if it (and the dLOM Detection Block) should declare or clear the dLOM defect condition.

Please see the blog post on the dLOM Defect for more information on how the Multi-Frame Alignment block will declare and clear the dLOM defect condition.

Removal of the FAS, MFAS, and FEC Fields from the incoming OTUk Data-stream

The Frame-Alignment block will drive the CI_FS (Frame-Start) output of the OTUk_CP Interface, HIGH for one CI_CK (Clock Signal) period, each time it detects the FAS field within its incoming OTUk data-stream.

Likewise, the Multi-Frame Alignment block will drive the CI_MFS (Multi-Frame Start) output of the OTUk_CP Interface, HIGH, for one CI_CK (Clock Signal) period each time it receives an MFAS byte with the value of 0x00.

The Frame-Alignment and Multi-Frame Alignment block will also remove the FAS and MFAS fields from the OTUk data stream (before it outputs this data stream via the CI_D output of the OTUk_CP Interface).

From this point on, the CI_FS and CI_MFS signals will now carry the framing and multi-framing alignment information downstream toward the OTUk_TT_Sk atomic function.

The FEC Decoder block will also remove the contents of the FEC field from the OTUk data stream before it outputs this data via the CI_D output pin.

Consequent Actions Block

In most cases, the Consequent Actions block will consist of digital logic circuitry that will assert the CI_SSF (Server Signal Fail) Output (of the OTUk_CP Interface) anytime the OTSi/OTUk-a_A_Sk function declares any of the following defect conditions.

dLOS-P – Loss of Signal- Path Defect Condition
dAIS – OTUk-AIS (Alarm Indication Signal) Defect Condition
dLOF – Loss of Frame Defect Condition
dLOM – Loss of Multi-Frame Defect Condition.
AI_TSF – If the upstream circuitry asserts the AI_TSF-P Input pin to this function.

Consequent Equation

ITU-T G.798 has the following Consequent Equation for the OTSi/OTUk_A_Sk function.

aSSF ⇐ dLOS-P or dAIS or dLOF or AI_TSF-P or dLOM

This Consequent Equation states that the OTSi/OTUk_A_Sk function MUST set aSSF to “1” (or drive the CI_SSF output pin to HIGH) if any of the following conditions are true:

The OTSi/OTUk_A_Sk function declares any of the following defect conditions.
- dLOS-P – Loss of Signal – Path Defect
- dAIS – OTUk-AIS Defect
- dLOF – Loss of Frame Defect
- dLOM – Loss of Multi-Frame Alignment Defect
Or, if the upstream Optical Circuitry drives the AI_TSF (Trail Signal Fail) input pin HIGH.

NOTE: Whenever this function asserts the CI_SSF output signal, it also asserts the CI_SSF input to the downstream OTUk_TT_Sk function.

Defect Correlation

If you wish to learn more about Defect Correlation and how you should interpret it, please see the Defect Correlation Post.

ITU-T G.798 specifies the following correlation equations for each OTSi/OTUk-a_A_Sk function-related defect.

cLOS-P ⇐ dLOS-P and (NOT AI_TSF-P)
cLOF ⇐ dLOF and (NOT dLOS-P) and (NOT dAIS) and (NOT AI_TSF-P)
cLOM ⇐ dLOM and (NOT dLOS-P) and (NOT dLOF) and (NOT dAIS) and (NOT AI_TSF-P)

I will briefly explain what each of these equations means below.

cLOS-P ⇐ dLOS-P and (NOT AI_TSF-P)

This equation means that the OTSi/OTUk-a_A_Sk function will ONLY declare the dLOS defect (and assert the cLOS-P output pin) if:

The Clock Recovery and LOS Detection circuitry is declaring the dLOS-P defect condition, and
The upstream circuitry is NOT asserting the AI_TSF-P input of this function.

In other words, the OTSi/OTUk-a_A_Sk function should only declare the dLOS defect (and assert the cLOS-P output pin) if it is internally declaring the dLOS-P defect condition.

cLOF ⇐ dLOF and (NOT dLOS-P) and (NOT dAIS) and (NOT AI_TSF-P)

This equation means that the OTSi/OTUk-a_A_Sk function will ONLY declare the dLOF defect (and assert the cLOF output pin) if:

The Frame Alignment and dLOF Detection circuitry declare the dLOF defect condition, and
The Optical upstream circuitry is NOT asserting the AI_TSF-P input of this function, and
The Clock Recovery and dLOS Detection circuitry is NOT currently declaring the dLOS-P defect condition, and
The dAIS Detection circuitry is NOT also declaring the dAIS defect condition.

In other words, the OTSi/OTUk-a_A_Sk function should only declare the dLOF defect (and assert the cLOF output pin) if it internally declares the dLOF defect condition.

cLOM ⇐ dLOM and (NOT dLOS-P) and (NOT dAIS) and (NOT dLOF) and (NOT AI_TSF-P)

This equation means that the OTSi/OTUk-a_A_Sk function will ONLY declare the dLOM defect (and assert the cLOM output pin) if:

The Multi-Frame Alignment and dLOM Detection circuitry declare the dLOM defect condition, and
The Optical upstream circuitry is NOT asserting the AI_TSF-P input of this function, and
The Clock Recovery and dLOS Circuitry is NOT currently declaring the dLOS-P defect condition, and
The dAIS Detection circuitry is NOT also declaring the dAIS defect condition,
The Frame Alignment and dLOF Detection circuitry are not currently declaring the dLOF defect condition.

Performance Monitoring

ITU-T G.798 requires that the OTSi/OTUk-a_A_Sk or OTSi/OTUk-v_A_Sk Functions tally and report the following Performance Monitoring parameter to System Management:

pFECcorrErr ⇐ ∑nFECcorrErr

In other words, the OTSi/OTUk-a_A_Sk or OTSi/OTUk-v_A_Sk functions are expected to tally and report each instant that the FEC Decoder block corrects an errored symbol within the incoming OTUk data stream.

Pin Description

I list the Input/Output Pin Description for the OTSi/OTUk-a_A_Sk Atomic Function below in Table 2.

Table 2, Pin Description for the OTSi/OTUk-a_A_Sk Atomic Function

Signal Name	Type	Description
OTSi_AP Interface
AI_PLD	Input	OTUk Adaptation Information - OTUk Payload Input: The user is expected to apply a fully-framed and scrambled OTUk signal (with FEC) to this input port. NOTE: In most cases, this data will be received data that has just been converted back into the electrical format (from the optical format). The OTSi/OTUk-a_A_Sk function will accept and descramble this data and extract out all of the following data from this signal. - FEC - It will decode the FEC and it will correct most symbol errors that this function detects within this incoming data stream. - FAS - The Framing Alignment Signal. The Framing Alignment signal information will be output via the CI_FS output of this function. - MFAS - The Multiframe Alignment Signal. The Multiframe Alignment signal information will be output via the CI_MFS output of this function. - OTUk Data - The content of the rest of the unscrambled OTUk data-stream. This remaining OTUk data-stream will be output via the CI_D output of this function. - OTUk Clock signal. The resulting OTUk clock signal will be output via the CI_CK output of this function.
AI_TSF-P	Input	Adapted Information - Trail Signal Fail - Path: This signal indicates whether the upstream circuitry is declaring a service-affecting defect condition (within the signal path) with the data that is being applied to the AI_PLD input. This signal has (essentially) the same meaning as AIS. If this signal is TRUE, then the OTSi/OTUk-a_A_Sk function will automatically set the CI_SSF output TRUE.
AI_TSF-O	Input	Adapted Information - Trail Signal Fail - Overhead: This signal indicates whether upstream circuitry is declaring a service-affecting defect condition within the signal overhead. NOTE: This signal does not reflect the health of the signal-path.
OTUk_CP Interface
CI_D	Output	OTUk Characteristic Information - Data Output: The OTSi/OTUk-a_A_Sk function will output the OTUk data-stream via this output pin. This OTUk data-stream will be unscrambled and it will contain all of the following portions of the OTUk frame. - OTUk SMOH (Section Monitoring Overhead) data - All remaining OTUk payload data (e.g., the ODUk/OPUk data). This data will not include the FAS, MFAS nor FEC fields. Data that is output via this signal, will be aligned with one of the edges of the CI_CK clock output signal. The system designer will typically route this signal to the CI_D input to the downstream OTUk_TT_Sk function.
CI_CK	Output	OTUk Characteristic Information - Clock Output: As the OTUk_CP interface outputs data via the CI_D, CI_FS, CI_MFS and CI_SSF outputs; all of this data will be updated on one of the clock-edges of this clock output signal.
CI_FS	Output	OTUk Characteristic Information - Frame Start Output: The OTUk_CP Interface will pulse this output signal HIGH (for one CI_CK clock period) whenever the OTUk_CP interface outputs the very first bit (or byte) of a new OTUk frame, via this CI_D output. This output signal will pulse HIGH once for each OTUk frame.
CI_MFS	Output	OTUk Characteristic Information - Multiframe Start Output: The OTUk_CP Interface will pulse this output signal HIGH (for one CI_CK period) whenever the OTUk_CP Interface outputs the very first bit (or byte) or a new OTUk multi-frame via the CI_D output. This output signal will pulse HIGH once for each OTUk Multi-frame (or one for every 256 OTUk frames).
CI_SSF	Output	OTUk Characteristic Information - Server Signal Failure Output: The OTUk_CP Interface will assert this signal anytime the OTSi/OTUk-a_A_Sk function is declaring a service-affecting defect with the data that it is receiving via the AI_D input). The OTUk_CP Interface will assert this output signal, whenever the OTSi/OTUk-a_A_Sk function is declaring any of the following defects. - dLOF - dLOM - dAIS - AI_TSF (if the upstream circuitry is driving the AI_TSF-P input pin, to this function, HIGH).
OTSi/OTUk-a_A_Sk_MP Interface
MI_FECEn	Input	Management Interface - OTSi/OTUk-a_A_Sk FEC Decoding Enable/Disable Input: This input pin permits the function user to either enable or disable FEC Decoding within the OTSi/OTUk-a_A_Sk function. Setting this input HIGH enables FEC Decoding. Setting this input LOW disables FEC Decoding. If the FEC Decoder is enabled, then it will use the FEC field to correct most symbol errors within the incoming OTUk data-stream (via the AI_PLD input).
MI_pFECcorrErr	Output	Management Interface - FEC Corrected Symbol Count Output: This output port reflects the number of symbol errors that the OTSi/OTUk-a_A_Sk function has corrected via the FEC Decoder. This is a Performance Monitoring feature within the OTSi/OTUk-a_A_Sk function. NOTE: This output pin is INACTIVE if the MI_FECEn input pin is set low (to disable the FEC Decoder).
MI_cLOM	Output	Management Interface - Loss of Multiframe (Correlated) Output Indicator: This output pin indicates if the OTSi/OTUk-a_A_Sk function is currently declaring the dLOM defect. If this input pin is LOW, then it indicates that the function is NOT currently declaring the dLOM defect condition. Conversely, if this input pin is HIGH, then it indicates that the function is currently declaring the dLOM defect condition. Please see the dLOM defect post for more information on this topic.
MI_cLOF	Output	Management Interface - Loss of Frame (Correlated) Output Indicator: This output pin indicates if the OTSi/OTUk-a_A_Sk function is currently declaring the dLOF defect. If this output pin is LOW, then it indicates that the function is NOT currently declaring the dLOF defect condition. Conversely, if this output pin is HIGH, then it indicates that the function is currently declaring the dLOF defect condition. Please see the blog post on the dLOF defect for more information on this topic.
MI_cLOS	Output	Management Interface - Loss of Signal (Correlated) Output Indicator: This output pin indicates if the OTSi/OTUk-a_A_Sk function is currently declaring the dLOS defect. If this output pin is LOW, then it indicates that the function is NOT currently declaring the dLOS defect. Conversely, if this output pin is HIGH, then it indicates that the function is currently declaring the dLOS defect condition. Please see the blog post on the dLOS defect, for more information about this topic.

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What is the OTSi/OTUk_A_So Function?

This post briefly describes the OTSi/OTUk_A_So (OTSI to OTUk Adaptation Source) Atomic Function. This function will perform tasks (like FEC Encoding) to condition the OTU data stream, prior to transport over Optical Fiber.

What is the OTSi/OTUk_A_So Atomic Function?

The expression: OTSi/OTUk_A_So is an abbreviation for the term: Optical Tributary Signal to OTUk Adaptation Source Function.

This blog post will briefly describe the OTSi/OTUk_A_So set of atomic functions.

Changes in Terminology

However, the standards committee has recently decided to change the wording from using the term OCh (for Optical Channel) to OTSi (for Optical Tributary Signal).

For completeness, I will tell you that ITU-T G.959.1 defines the term OTSi as:

Therefore, to “speak the same language” as the standard committee, we will call this atomic function the OTSi/OTUk_A_So atomic function.

Likewise, in another post, we will now call (what we used to call the OCh/OTUk_A_Sk function) the OTSi/OTUk_A_Sk function.

I have created another post that provides documentation of the relationships between some old (now obsolete) terms and the new (and approved) ones that our standard committee is currently using.

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The OTSi/OTUk_A_So Function

The OTSi/OTUk_A_So function is any circuit that takes an OTUk data-stream, clock, frame-start, and multi-frame start signals and converts this data into a combined, scrambled data-stream, which (in some cases) contains a FEC (Forward Error Correction) field. This data stream can be readily converted into the optical format (at the output of this function).

ITU-T G.798 states that the system designer can use this function for all OTUk rates (e.g., from OTU1 through OTU4).

However, in most cases, we will typically use the OTSi/OTUk_A_So function for OTU1 and OTU2 applications. We will usually use the OTSiG/OTUk_A_So atomic function for OTU3 and OTU4 applications.

We discuss the OTSiG/OTUk_A_So atomic function in another post.

Figure 1 presents a simple illustration of the OTSi/OTUk_A_So function.

Figure 1, Simple Illustration of the OTSi/OTUk_A_So function.

ITU-T G.798 defines three variants of this particular function. I have listed these variants below in Table 1.

Table 1, List of the ITU-T G.798-specified Variants for the OTSi/OTUk_A_So functions

Function Name	Description	Comments
OTSi/OTUk-a_A_So	OTSi to OTUk Adaptation Source Function with ITU-T G.709 Standard FEC	Can be used for OTU1 through OTU4 applications
OTSi/OTUk-b_A_So	OTSi to OTUk Adaptation Source Function with No FEC	Cannot be used for OTU4 applications
OTSi/OTUk-v_A_So	OTSi to OTUk Adaptation Function with Vendor-Specific FEC	Can be used for OTU1 through OTU4 applications

Table 1 shows that the OTSi/OTUk-a_A_So and the OTSi/OTUk-v_A_So functions will compute and append some FEC field to the back-end of each outbound OTUk frame.

However, this table also shows that the OTSi/OTUk-b_A_So variant does not generate the FEC field.

Consequently, ITU-T G.798 states that one can use the OTSi/OTUk-a_A_So and OTSi/OTUk-v_A_So functions for OTU1 through OTU4 applications. The standard also recommends that the user NOT use the OTSi/OTUk-b_A_So function for OTU4 applications.

The OTU4 rate requires the use of Forward-Error-Correction.

What Variant will we Discuss Throughout this Post?

Throughout this post, we will be discussing the OTSi/OTUk-a_A_So version of this atomic function.

The OTSi/OTUk-b_A_So and OTSi/OTUk-v_A_So atomic functions do everything that the OTSi/OTUk-a_A_So does, except that the -b variant does NO FEC Encoding and the -v variant does FEC Encoding differently than what I describe here.

So What All Does this Atomic Function Do?

The OTSi/OTUk-a_A_So function will accept the OTUk data-stream, OTUk clock signal, frame-start signal, and multi-frame start signals via the CI_D, CI_CK, CI_FS, and CI_MFS inputs (of this function) respectively, and it will perform the following tasks.

It will insert the FAS and MFAS fields into the OTUk data stream (coincident with whenever the upstream OTUk_TT_So function asserts the CI_FS and CI_MFS input, respectively).
This function will compute and append a FEC field to the back-end of each outbound OTUk frame)
It will scramble this “combined” OTUk data stream (consisting of the FAS, MFAS, and FEC fields)
This function will then transmit this combined (and scrambled) data stream to external Electrical-to-Optical Conversion circuitry (which will convert our full-blown OTUk signal into the optical format).

Figure 2 illustrates a Unidirectional Connection that shows where the OTSi/OTUk-a_A_So function “fits in” within a system.

Figure 2, Illustration of an STE, transmitting an OTUk signal (over optical fiber) to another STE – the OTSi/OTUk-a_A_So function is highlighted.

Functional Description of this Atomic Function

Let’s take a closer look at this function now.

Figure 3 presents the Functional Block Diagram of the OTSi/OTUk-a_A_So Atomic Function.

Figure 3, Illustration of the Functional Block Diagram of the OTSi/OTUk-a_A_So Atomic Function

Hence, Figure 3 shows that this function contains the following functional blocks.

MFAS/FAS Insertion Block
FEC Encoder Block
Scrambler Block

I will briefly discuss each of these functional blocks below.

The MFAS/FAS Insertion Block

The MFAS/FAS Insertion block will insert the FAS and MFAS fields into the outbound OTUk data stream each time the upstream OTUk_TT_So function asserts the CI_FS input pin.

Likewise, the MFAS/FAS Insertion block will initialize the MFAS byte-field (to 0x00) within the outbound OTUk-data-stream each time the upstream OTUk_TT_So function asserts the CI_MFS input.

The MFAS/FAS Insertion Block will proceed to increment the contents of the MFAS field within each OTUk frame it generates.

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The FEC Encoder Block

The FEC Encoder Block (within the OTSi/OTUk-a_A_So function) will compute the FEC field and append this field to the back-end of each outbound OTUk frame.

ITU-T G.709 recommends that (for a Fully-Compliant OTUk Frame), one uses the Reed Solomon RS(255,239) Code for its Forward-Error Correction scheme.

I show the location (that the FEC Encoder should insert the FEC Code) within the OTUk frame below in Figure 4.

Figure 4, Location of FEC Code (at the back-end of each outbound OTUk frame)

Another post discusses this Forward Error Correction scheme in much greater detail.

Scrambler Block

ITU-T G.709 mandates that we scramble OTUk data before we transmit it over optical fiber.

The standard requires that we do this to ensure that this OTUk signal (that we transmit over optical fiber) has sufficient bit-timing content for Clock and Data Recovery PLLs (Phase-Locked Loops) within the Sink STE (at the remote end).

ITU-T G.709 further states that the Scrambler must operate as a frame synchronous scrambler of sequence length 65,535 (e.g., 2¹⁶-1), running at the OTUk rate.

Finally, ITU-T G.709 also states that the Scrambler must use the generating polynomial of 1 + x + x³ + x¹² + x¹⁶.

I show a simple diagram of how one can implement the Scrambler within their OTSi/OTUk-a_A_So function design below in Figure 5.

Figure 5, High-Level Block Diagram of the Frame Synchronous Scrambler

I discuss the Scrambler function and requirements in greater detail in another post.

Once the OTSi/OTUk-a_A_So function has scrambled this outbound OTUk data stream, it will transmit it to some Electrical-to-Optical conversion circuitry (which will convert this data stream into the Optical Format) for transmission.

Function Defects

This function does not declare any defect conditions.

Function Consequent Equations

This function does not have any Consequent Action (or Equations).

Pin Description of the OTSi/OTUk-a_A_S0 Function

Table 2 presents a list and description of each of the Input and Output pins of the OTSi/OTUk-a_A_So Function.

Table 2, Pin Description of the OTSi/OTUk-a_A_So Atomic Function

Signal Name	Type	Description
OTUk_CP Interface
CI_D	Input	OTUk Characteristic Information - Data Input: The function user (upstream OTUk_TT_So function) is expected to apply the OTUk data-stream via this input. This OTUk data-stream will contain all of the following portions of the OTUk frame. - OTUk SMOH (Section Monitoring Overhead) data - All remaining OTUk payload data (e.g., the ODUk/OPUk data). NOTE: This data will not include the FAS, MFAS nor FEC fields. All data that the user supplies to this input should be synchronized with the CI_CK input clock signal. NOTE: This OTUk data-stream should be unscrambled.
CI_CK	Input	OTUk Characteristic Information - Clock Input: This clock signal will sample all data that the user supplies to the CI_D, CI_FS and CI_MFS inputs. The OTSi/OTUk-a_A_So function will also use this clock signal as its base timing source.
CI_FS	Input	OTUk Characteristic Information - Frame Start Input: The upstream OTUk_TT_Sk function will drive this input signal TRUE, coincident to whenever it is supplying the very first bit or byte (of a given OTUk frame) to the CI_D input. The OTSi/OTUk-a_A_So function will insert the FAS field into the outbound OTUk data-stream coincident to whenever the user asserts this input signal. The upstream OTUk_TT_So function is expected to assert this signal once for each OTUk frame period.
CI_MFS	Input	OTUk Characteristic Information - Multiframe Start Input: The upstream OTUk_TT_So function will drive this input signal TRUE coincident to whenever it is supplying the very first bit or byte of a given OTUk superframe to the CI_D input. The OTSi/OTUk-a_A_So function will set the MFAS byte to 0x00 coincident to whenever the user asserts this input signal. The upstream OTUk_TT_So function is expected to assert this signal once for each OTUk superframe period, one once every 256 OTUk frame periods.
OTSi_AP Interface
AI_PLD	Output	OTSi Adapted Information - OTSi Payload Output: The OTSi/OTUk-a_A_So function takes all of the data (that the user supplies to the CI_D input pin), along with the FAS, MFAS and FEC data that it has also inserted into this OTUk data-stream. Finally, this function will scramble this data before it outputs all of this data via this output pin. In summary, this signal will contain a full-blown OTUk data-stream (that consists of all of its framing fields and the FEC) and is also scrambled. The system-designer will typically route this data-stream to cicuitry that will convert or modulate this dat into the optical format (for transmission over optical fiber).

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OTN Related Topics within this Blog

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What is the OTUk_TT_Sk Function?

This blog post briefly describes the OTUk_TT_Sk (OTUk Trace Termination Sink) Atomic function. This function will check for dDEG and dTIM defect conditions. It will also detect and flag SM-BIP-8 Errors.

What is the OTUk_TT_Sk Atomic Function?

We formally call the OTUk_TT_Sk Atomic Function the OTUk Trail Termination Sink function.

Introduction

The OTUk_TT_Sk function is any circuit that accepts an OTUk data stream from the upstream OTSi/OTUk_A_Sk function (for OTU1 and OTU2 applications) or the upstream OTSiG/OTUk_A_Sk function (for OTU3 or OTU4 applications) and extracts and processes the data within the OTUk Section Monitoring Overhead (OTUk-SMOH) from the incoming OTUk signal.

The OTUk_TT_Sk function will evaluate this data to check for various defects and errors.

NOTE: I offer an extensive discussion of the OTUk_TT_Sk Atomic Function within Lesson 9 of THE BEST DARN OTN TRAINING PRESENTATION….PERIOD!!!

So What Does this Atomic Function Do?

If you recall, from our discussion of the OTUk/ODUk_A_So and OTUk_TT_So functions, those two particular functions will take an ODUk signal and work together to create an OTUk data stream with some newly computed OTUk-SMOH.

The OTUk_TT_So function will then route this OTUk data stream to the OTSi/OTUk-a_A_So (for OTU1/2 applications) or the OTSiG/OTUk-a_A_So functions (for OTU3/4 applications).

These functions will condition the OTUk signal for transport. Next, one of these functions will route this OTUk signal through other circuitry that will convert this OTUk data stream into the optical format and transport this data stream over optical fiber.

A receiving Network Element will receive this optical signal and convert this data back into the electrical format. This electrical signal will pass through the OTSi/OTUk-a_A_Sk atomic function (for OTU1/2 applications) or the OTSiG/OTUk-a_A_Sk atomic function (for OTU3/4 applications) before it finally reaches the OTUk_TT_Sk function.

I illustrate where the OTUk_TT_Sk function “fits in the big picture” below in Figure 1.

Figure 1, Illustration of Unidirectional Connection between a Source STE and a Sink STE with the OTUk_TT_Sk function highlighted.

Once this OTUk data arrives at the OTUk_TT_Sk function, it will perform the following tasks on this data stream.

Extracts and Processes the OTUk-SMOH within the incoming OTUk Data-Stream

The OTUk_TT_Sk function will accept this OTUk data stream and extract and process the OTUk-SMOH data from the incoming OTUk signal. The OTUk_TT_Sk function will evaluate this data to check for various defects and errors.

In other words, the OTUk_TT_Sk function will evaluate the OTUk_SMOH (the OTUk_TT_So function, at the remote STE) created. The OTUk_TT_Sk function will evaluate the OTUk-SMOH to check and see if it should declare certain types of defect conditions or if certain kinds of errors have occurred within this OTUk signal during transmission over optical fiber, as we describe below.

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Detect and Flag Defects and Errors within the Incoming OTUk Data-Stream

More specifically, the OTUk_TT_So function will check the following defect conditions for (and declare or clear).

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Additionally, the OTUk_TT_Sk function will also detect and flag the following errors (within this OTUk data stream):

Some Details about the OTUk_TT_Sk Function

Figure 2 presents a simple illustration of the OTUk_TT_Sk function.

Figure 2, Simple Illustration of the OTUk_TT_Sk Atomic Function

The Interfaces within the OTUk_TT_Sk Atomic Function

Figure 2 shows that this function consists of four different interfaces.

OTUk_TCP – The OTUk Termination Connection Point: This is where the function user supplies data (which most likely came from an upstream OTSi/OTUk-a_A_Sk or OTSiG/OTUk-a_A_Sk function) to the OTUk_TT_Sk function. This data will typically consist of the entire OTUk data stream (without the FEC, which was already decoded by the upstream OTSi/OTUk-a_A_Sk or OTSiG/OTUk-a_A_Sk function).
OTUk_AP – The OTUk Access Point: This is where the function outputs OTUk data, clock, frame, and multi-frame signals (of the incoming OTUk data-stream) to downstream circuitry (towards the OTUk/ODUk_A_Sk function).
OTUk_TT_Sk_MP – The Function Management Point: This interface permits the function-user to exercise control and monitor the activity within the OTUk_TT_Sk function. Some information the user can obtain from the Management Point includes Performance Monitoring and Correlated Defect Identification.
OTUk_TT_RP – The Function Remote Point: This interface permits the function-user to output some information to a collocated OTUk_TT_So function. This information includes the BDI, BEI, and BIAE indicators. The collocated OTUk_TT_So function will respond to this signaling (from the OTUk_TT_Sk function – via the RP port) by transmitting the BEI values, BDI, and BIAE indicators back out to the Remote STE, as appropriate.

A Closer Look at the Interfaces within the OTUk_TT_Sk Function.

We will now take a closer look at these interfaces below.

The OTUk_TCP (Termination Connection Point) Interface

The OTUk_TT_Sk function accepts an OTUk data stream from either the upstream OTSi/OTUk-a_A_Sk or OTSiG/OTUk-a_A_Sk function via the OTUk_TCP Interface.

The data that either the OTSi/OTUk-a_A_Sk or the OTSiG/OTUk-a_A_Sk function outputs are a full-blown OTUk frame (that has been descrambled) by those functions.

Figure 3 presents a functional block of the OTUk_TT_Sk function.

Figure 3, Functional Block Diagram of the OTUk_TT_Sk Function

Finally, Figure 3 shows that the equipment that we connect to the OTUk_TCP (of the OTUk_TT_Sk function) will supply the following signals to this function.

CI_D
CI_CK
CI_FS
CI_MFS

The OTUk_TT_Sk function will perform the following operations on each OTUk frame within this signal.

OTUk-SMOH (Section Monitoring Overhead) Extraction
Compute and Verify the BIP-8 Value
Receive and Process TTI (Trail-Trace Identifier) Messages
Declares and clears the following defects (as appropriate)
- dIAE – Will also be forward to the RI_BIAE output in the form of the BIAE indicator.
- dTIM – Will be reported via the RI_BDI output by way of the BDI signal and will also be notified via the AI_TSF output.
- dDEG – will also be reported via the AI_TSD output
- dBDI
- dBIAE

The OTUk_TT_Sk_MP (Management Point) Interface

As the OTUk_TT_Sk function performs all of the above actions on the data (that it receives via the OTUk_TCP Interface), it will tally and report all of the following performance monitoring parameters to System Management (via the Management Interface).

Report and Tally the following errors
- BIP-8 Errors– reported as nBIPV (to the RI_REI output) and as nN_B in performance monitoring.
- BEI Count – reported as nF_B in Performance Monitoring
To provide Performance Monitoring reports on the following parameters to System Management
- pIAE – Input Alignment Error defect seconds
- pN_BIAE – Backward Input Alignment Error defect seconds
- pN_EBC – Near-End Errored Block Count (SM-BIP-8)
- pN_DS – Near-End Defect Second
- pF_EBC – Far-End Errored Block Count
- pF_DS – Far-End Defect Second

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The OTUk_TT_Sk_RP (Remote Point) Interface

The OTUk_TT_Sk_RP Interface contains three (3) output ports that the System Designer should connect to the collocated OTUk_TT_So Atomic Function.

RI_BDI – Remote Interface – Backward Defect Indicator
RI_BEI – Remote Interface – Backward Error Indicator
RI_BIAE – Remote Interface – Backward Input Alignment Error

Whenever the user connects these three (3) output pins to similarly named pins at the collocated OTUk_TT_So function, these two functions will work together to transmit backward alarm and error information to the remote STE (the source of the OTUk data-stream that this OTUk_TT_Sk function is receiving).

Please click on the appropriate links to learn more about these backward (or far-end) indicators and how the OTUk_TT_Sk function accomplishes these forms of signaling with its collocated OTUk_TT_So function.

The OTUk_AP (Access Point) Interface (Output)

The OTUk_TT_Sk function will output the following signals via the OTUk_AP Interface.

AI_D – OTUk Adapted Information – Data Output
AI_CK – OTUk Adapted Information – Clock Output
AI_FS – OTUk Adapted Information – Frame Start Output
AI_MFS – OTUk Adapted Information – Multi-Frame Start Output
AI_TSF – OTUk Adapted Information – Trail Signal Fail (TSF) Indicator Output
AI_TSD – OTUk Adapted Information – Trail Signal Degrade (TSD) Indicator Output.

In most cases, the System Designer would route these output signals to the downstream OTUk/ODUk_A_Sk function for further processing.

AI_D, AI_CK, AI_FS, and AI_MFS will contain the remaining OTUk data-stream, clock, frame-start, and multi-frame start indicators for the OTUk/ODUk_A_Sk function.

Defect Notification – Downstream

The OTUk_TT_Sk function will assert the AI_TSF output pin anytime it declares a service-affecting defect (dTIM) itself or if the upstream circuitry (e.g., the OTSiG/OTUk-a_A_Sk or the OTSi/OTUk-a_A_Sk functions) are declaring service-affecting defects and asserting the CI_SSF input to this function.

Likewise, the OTUk_TT_Sk function will assert the AI_TSD output pin anytime it declares the dDEG (Signal Degrade) defect condition.

Consequent Actions

Consequent Action Equations specify what actions an Atomic Function should take any time (and for the duration) that it declares a certain defect. ITU-T G.798 presents the following equations for consequent actions within the OTUk_TT_Sk function.

aTSF <- CI_SSF or [dTIM and (NOT TIMActDis)]
aBDI <- CI_SSF or dTIM
aBEI <- nBIPV
aBIAE <- dIAE
aTSD <- dDEG

I will discuss each of these consequent action equations below.

aTSF <- CI_SSF or [dTIM and (NOT TIMActDis)]

Where:

aTSF is the Trail Signal Fail parameter that the OTUk_TT_Sk function will set LOW or HIGH to send current defect-state information towards downstream circuitry.

If aTSF = TRUE, then the OTUk_TT_Sk function will set its AI_TSF output HIGH. Conversely, if aTSF = FALSE, then the OTUk_TT_Sk function will set its AI_TSF output to LOW.

CI_SSF is the current state of the CI_SSF (Server Signal Fail Indicator) input from the upstream OTSi/OTUk_A_Sk or OTSiG/OTUk_A_Sk atomic functions. The OTSi/OTUk_A_Sk or OTSiG/OTUk_A_Sk function will assert this signal anytime it declares a service-affecting defect.

dTIM is the current state of the dTIM defect condition.

TIMActDis is a parameter the user can set to configure the dTIM to (optionally) drive the aTSF parameter.

This equation means that the OTUk_TT_Sk function will assert an internal signal (we call aTSF) if either of the following conditions is true.

The upstream circuitry (e.g., the OTSiG/OTUk-a_A_Sk or the OTSi/OTUk-a_A_Sk function) is asserting the CI_SSF input to this function, or
The OTUk_TT_Sk function declares the dTIM defect condition.

NOTES:

If the OTUk_TT_Sk function asserts the aTSF signal, it will indicate so by asserting the AI_TSF output pin towards downstream circuitry (e.g., the OTUk/ODUk_A_Sk function).
The AI_TSF output signal is a crucial signal for Automatic Protection Switching purposes.
Please see the OTSi/OTUk_A_Sk or OTSiG/OTUk_A_Sk posts for information on what causes these two functions to drive the CI_SSF signal HIGH.

aBDI <- CI_SSF or dTIM

This equation means that the OTUk_TT_Sk function will assert another internal signal (the aBDI signal) if either of the following conditions is true.

The upstream circuitry (e.g., the OTSiG/OTUk-a_A_Sk or the OTSi/OTUk-a_A_Sk function) is asserting the CI_SSF input to this function, or
The OTUk_TT_Sk function declares the dTIM defect condition.

NOTES:

If the OTUk_TT_Sk function asserts the aBDI signal, it will indicate so by asserting the RI_BDI output pin (via the Remote Point Interface). This signaling will command the collocated OTUk_TT_So function to set its BDI bit-field to TRUE within its next outbound OTUk frame.
The OTUk_TT_Sk function will assert the RI_BDI and AI_TSF output pins under the same conditions.
Please see the OTSi/OTUk_A_Sk or OTSiG/OTUk_A_Sk posts for information on what causes these two functions to drive the CI_SSF signal HIGH.

aBEI <- nBIPV

This equation means that the OTUk_TT_Sk function will automatically set the internal signal aBEI to the total number of BIP-8 errors detected within a given OTUk frame. This means the OTUk_TT_Sk function can set aBEI to a value between 0 and 8 within each OTUk frame.

NOTE: If the OTUk_TT_Sk function sets aBEI to a particular value, it will set the RI_BEI output pin (via the Remote Point Interface) to this same value. This signaling will command the collocated OTUk_TT_So function to set its BEI nibble-field to this same value (aBEI), within its next outbound OTUk frame, provided that RI_BIAE is set FALSE.

aBIAE <- dIAE

This equation means that the OTUk_TT_Sk function will assert the internal signal, aBIAE, if it declares the dIAE (Input Alignment Error) defect condition.

NOTES:

If the OTUk_TT_Sk function is asserting the aBIAE signal, it will indicate so by asserting the RI_BIAE output pin (via the Remote Point Interface). This signaling will command the collocated OTUk_TT_So function to set the BEI/BIAE nibble-field to reflect the BIAE condition within its next outbound OTUk frame.
The OTUk_TT_Sk function will NOT assert the AI_TSF or RI_BDI output signals because it declares the dIAE defect condition.

aTSD <- dDEG

This equation means that the OTUk_TT_Sk function will assert the internal signal aTSD anytime it declares the OTUk-dDEG (Signal Degrade) defect condition.

NOTES:

If the OTUk_TT_Sk function is asserting the aTSD condition, it will indicate so by asserting the AI_TSD output signal towards the downstream circuitry (e.g., the OTUk/ODUk_A_Sk function in this case).
The OTUk_TT_Sk function will NOT assert the RI_BDI output signal because it declares the dDEG defect condition.

The AI_TSD output signal is an essential signal for Automatic Protection Switching purposes.

The OTUk_TT_Sk Function Pin Description

Table 1 presents a Description of each of the Input and Output pins of the OTUk_TT_Sk function.

Table 1, Pin Description of the OTUk_TT_Sk Atomic Function

Signal Name	Type	Description
OTUk_TCP Interface
CI_D	Input	OTUk Characteristic Information - Data Input: The OTUk_TT_Sk function will accept this data from either the upstream OTSi/OTUk-a_A_Sk or OTSiG/OTUk-a_A_Sk function via this input pin. The OTUk_TT_Sk function will then perform the following actions on this data. - It will extract out and process the SMOH (Section Monitoring Overhead) and -- Compute and Verify the BIP-8 data and it will detect and flag any BIP-8 errors within each OTUk frame. -- It will extract out the Section Monitoring Byte and check the state of the BDI and IAE bit-fields. -- It will read in the value of the BEI/BIAE nibble field and check for the BIAE indicator. -- It will also read in and tally all non-zero (and non-BIAE) BEI values and BIP-8 errors. -- It will extract out the TTI message and compare this read-out value with that of the expected TTI Message. As the OTUk_TT_Sk performs all of these tasks it will declare or clear the following defect conditions (as warranted). - dBDI - dTIM - dIAE - dBIAE - dDEG It will tally the following events for Performance Monitoring purposes. - pIAE - Number of seconds in which the OTUk_TT_Sk function declared the dIAE defect. - pN_BIAE - Number of seconds in which the OTUk_TT_Sk function declared the dBIAE defect. - pN_EBC - Number of Near-End Errored Block Counts (BIP-8 Errors). - pN_DS - Number of Defect Seconds (seconds in which the OTUk_TT_Sk (or upstream circuitry) declared certain near-end defect conditions. - pF_EBC - Number of Far-End Errored Block Counts (BEI Count) - pF_DS - Number of Far-End Defect Seconds (seconds in which the OTUk_TT_Sk function is declaring the dBDI defect condition). The OTUk_TT_Sk function will sample this data on one of the edges of the CI_CK input clock signal.
CI_CK	Input	OTUk Characteristic Information - Clock Input: The OTUk_TCP Interface will use this clock input signal to sample all of the following input signals. - CI_D - CI_FS - CI_MFS - CI_SSF This clock signal also functions as the timing source of the OTUk_TT_Sk function.
CI_FS	Input	OTUk Characteristic Information - Frame Start Input: The upstream circuitry should drive this input signal HIGH whenever it is applying the very first bit/byte of a new OTUk frame to the CI_D input. The upstream circuitry should drive this input signal HIGH once for each incoming OTUk frame.
CI_MFS	Input	OTUk Characteristic Information - Multi-Frame Start Input: The upstream circuitry should drive this input signal HIGH whenever it is applying the very frist bit/byte of a new OTUk superframe to the CI_D input. The upstream circuitry should drive this input signal HIGH once for each incoming OTUk superframe (or once every 256 OTUk frames).
CI_SSF	Input	OTUk Characteristic Information - Server Signal Failure Indicator Input: This input pin indicates whether or not the upstream circuitry is declaring a service-affecting defect with the OTUk data-stream (that it is applying to the CI_D input). These service-affecting defects include: - dLOF - dLOM - dAIS (for OTU1 or OTU2 applications only). This signal is functionally equivalent to the AIS indicator. LOW - Indicates that the upstream circuitry is NOT declaring a service-affecting defect with the OTUk signal (being applied to the CI_D input). HIGH - Indicates that the upstream circuitry IS declaring a service-affecting defect with the OTUk signal (being applied to the CI_D input).
OTUk_AP Interface
AI_D	Output	OTUk Adapted Information - Data Output: The OTUk_TT_Sk function will output the OTUk data, after it has passed through and been processed by this function. This data will typicallly be routed to the OTUk/ODUk_A_Sk function for further processing. This data will be updated (and output) synchronously with the AI_CK clock output signal.
AI_CK	Output	OTUk Adapted Information - Clock Output: The OTUk_TT_Sk function will update/output signals via the OTUk_AP Interface on one of the edges of this clock output signal. - AI_D - AI_FS - AI_MFS - AI_TSF - AI_TSD
AI_FS	Output	OTUk Adapted Information - Frame Start Output: The OTUk_AP Interface will drive this output signal HIGH whenever it is also driving the very first bit/byte of a new OTUk frame via this AI_D output. The OTUk_AP Interface will drive this output HIGH once for each outbound OTUk frame.
AI_MFS	Output	OTUk Adapted Information - Multiframe Start Output: The OTUk_AP Interface will drive this output signal HIGH whenever it is also driving the very first bit/byte of a new OTUk superframe via the AI_D output. The OTUk_AP Interface will drive this output HIGH once for each oubound OTUk superframe.
AI_TSF	Output	OTUk Adapted Information - Trail Signal Fail Output Indicator Output: The OTUk_TT_Sk function will indicate whether or not it is declaring the Trail-Signal Fail (TSF) condition. The OTUk_TT_Sk function will declare the TSF condition, if it also declares any of the following defect conditions. - dTIM - SSF (if the CI_SSF input was driven HIGH due to any of the following defects within the upstream circuitry). -- dLOF -- dLOM -- dAIS (OTU1/OTU2 applications only). LOW - Indicates that the OTUk_TT_Sk function is NOT currently declaring the TSF indicator. HIGH- Indicates that the OTUk_TT_Sk function is currently declaring the TSF indicator.
AI_TSD	Output	OTUk Adapted Information - Trail Signal Declared Indicator Output: The OTUk_TT_Sk function will use this output signal to indicate if it is declaring the Trail-Signal Defect (TSD) Condition. The OTUk_TT_Sk function will declare the TSD condition if it also declares the dDEG (Signal Degrade) defect condition. LOW - Indicates that the OTUk_TT_Sk function is NOT currently declaring the TSD indicator. HIGH - Indicates that the OTUk_TT_Sk function is currently declaring the TSD indicator.
OTUk_RP Interface
RI_BEI	Output	OTUk Remote Point Information - Backward Error Indicator: As the OTUk_TT_Sk function computes and verifies the BIP-8 values (within the OTUk signal that it is receiving via the CI_D input), it will output date through this output to reflect the number of BIP-8 errors that it is declaring within each incoming OTUk frame. This output signal will be connected to the RP input of its collocated OTUk_TT_So function. If the OTUk_TT_Sk detects ZERO BIP-8 errors within the most recently received OTUk frame, then it will set RI_BEI = 0 for that OTUk frame period. Likewise, if the OTUk_TT_Sk function detects five (5) BIP-8 errors within the most recenlty received OTUk frame, then it will set RI_BEI = 5 for that OTUk frame period.
RI_BIAE	Output	OTUk Remote Point Information - Backward Input Alignment Error Indicator: If the OTUk_TT_Sk function declares the dIAE defect condition, then it will set the RI_BIAE indicator true. This output signal will be connected to the corresponding RP Input of the collocated OTUk_TT_So function. The collocated OTUk_TT_So function is expected to overwrite the BEI nibble-field (within the next outbound OTUk frame). Please see the OTUk_TT_So function post for more details on this topic).
RI_BDI	Output	OTUk Remote Point Information - Backward Defect Indicator: If the OTUk_TT_Sk function declares any of the following defect conditions, then it will set this output pin TRUE. - dTIM - CI_SSF The user should connect this output signal to the RI_BDI input of the collocated OTUk_TT_So function. The collocated OTUk_TT_So function is expected to set the BDI bit-field (within the Section Monitoring byte of the SMOH) to "1" within the next outbound OTUk frame, if this output pin is TRUE. Otherwise, the OTUk_TT_So function should set the BDI bit-field to "0" within the very next outbound OTUk frame.
OTUk_TT_So_MP Interface
MI_AcTI	Output	Management Interface - Accepted Trail Trace identifier Message Output: The OTUk_TT_Sk function will output the contents of the Accepted Trail Trace Identifier Message via this output signal. The OTUk_TT_Sk function will output the accepted TTI Message via this output, whenever the user issues a command requesting this data via the MI_GetAcTI input.
MI_ExSAPI	Input	Management Interface - Expected SAPI (Source Access Point Identifier) Input: The OTUk_TT_Sk function will compare the SAPI-portion of the "Accepted Trail-Trace Identification" Message (that it receives from the SMOH (within the OTUk signal) with that which the user supplies to this input. If the two values do not match, then the OTUk_TT_Sk function will declare the dTIM defect condition.
MI_ExDAPI	Input	Management Interface - Expected DAPI (Destination Access Point Identifier) Input: The function user is expected to apply the Expected Value of the DAPI portion of the Trail-Trace Identification Message. The OTUk_TT_Sk function will compare the DAPI portion of the "Accepted Trail-Trace Identification" Message (that it received from the SMOH (within the OTUk signal) with that which the user supplies to this input. If the two values do not match, then the OTUk_TT_Sk function will declare the dTIM defect condition.
MI_GetAcTI	Input	Mangement Interface - Get Accepted Message Command Input: This input permits the user to request that the OTUk_TT_Sk function provide the user with the currently "accepted" TTI Message. Whenever the user invokes this command, the OTUk_TT_Sk function will output the contents of the currently "accepted" TTI Message via the MI_ActTI output.
MI_TIMDetMo	Input	Management Interface - TIM (Trace Identifier Mismatch) Detection Mode: This input permits the user to specify which portion of the TTI Message that the OTUk_TT_Sk function should check and verify when checking for the dTIM defect condition. Please see the dTIM blog post for more details.
MI_cTIM	Output	Management Interface - Correlated TIM (Trail-Trace Identifier Mismatch) Defect: This output signal indicates if the OTUk_TT_Sk function is declaring the dTIM defect condition. LOW - Indicates that the OTUk_TT_Sk function is NOT currently declaring the dTIM defect condition. HIGH - Indicates that the OTUk_TT_Sk function is currently declaring the dTIM defect condition.
MI_cDEG	Output	Management Interface - Correlated DEG (Signal Degrade) Defect: This output signal indicates if the OTUk_TT_Sk function is declaring the dDEG defect condition. LOW - Indicates that the OTUk_TT_Sk function is NOT currently declaring the dDEG defect condition. HIGH - Indicates that the OTUk_TT_Sk function is currently declaring the dDEG defect condition.
MI_cBDI	Output	Management Interface - Correlated BDI (Backward Defect Indicator) Defect: This output signal indicates if the OTUk_TT_Sk function is declaring the dBDI defect condition. LOW - Indicates that the OTUk_TT_Sk function is NOT currently declaring the dBDI defect condition. HIGH - Indicates that the OTUk_TT_Sk function is currently declaring the dBDI defect condition.
MI_cSSF	Output	Management Interface - Correlated SSF (Server Signal Fail) Defect: This output signal indicates if the OTUk_TT_Sk function is declaring the SSF defect condition. LOW - Indicates that the OTUk_TT_Sk function is NOT currently declaring the SSF defect condition. This also means that the upstream circuitry is currently drving the CI_SSF input pin LOW. HIGH - Indicates that the OTUk_TT_Sk function is currently declaring the SSF defect condition. This also means that upstream circuitry is currently driving the CI_SSF input pin HIGH.
MI_pIAE	Output	Management Interface - IAE Performance Monitor Parameter: The OTUk_TT_Sk function will drive this output pin HIGH, for one full second, if it has declared the dIAE defect for any portion of the previouis one-second period. Conversely, the function will keep this output pin LOW, for one full second, if it has NEVER declared the dIAE defect, during the previous one-second period. This one second period will be dictated by the 1-Second Clock signal that the user supplies to the MI_1Second input to this function.
MI_pBIAE	Output	Management Interface - BIAE Performance Monitor Parameter: The OTUk_TT_Sk function will drive this output pin HIGH for one full second, if it has declared the dBIAE defect for any portion of the previous one second period. Conversely, the function will keep tis output pin LOW for one full second, if it has NEVER declared the dBIAE defect, during the previous one second period. This one second period will be dictated by the 1 Second Clock signal that the user supplies to the MI_1Second input to this function.
MI_pN_EBC	Output	Management Interface - Number of Near-End Errored Block Count (BIP-8 Errors) - One Second Performance Monitoring Parameter: The OTUk_TT_Sk function will tally and report the total number of BIP-8 errors, that it has detected and flagged (within the incoming OTUk data-stream), during the previous 1 second period.
MI_pN_DS	Output	Management Interface - Near-End Defect - One Second Performance Monitoring Parameter: The OTUk_TT_Sk fuinction will drive this output pin HIGH for one full second, if it has declared at least one of the following defects for any portion of the previous one-second period. - CI_SSF or - dTIM Conversely, the function will keep this output pin LOW, for one-full second, if it has NEVER declared any of these defect during the previous one-second period. This one-second period will be dictated by the 1 Second Clock signal that the user supplies to the MI_1Second input to this function.
MI_pF_EBC	Output	Management Interface - Number of Far-End Errored Block Count (BEI Errors) - One Second Performance Monitoring Parameter: The OTUk_TT_Sk function will tally and report the total number of BEI counts that it has read and captured (within the incoming OTUk data-stream) during the previous one-second period.
MI_pF_DS	Output	Management Interface - Far-End Defect - One Second Performance Monitoring Parameter: The OTUk_TT_Sk function will drive this output pin HIGH, for one full second, if it has declared the dBDI defect for any portion of the previous one-second period. Conversely, this function will keep this output pin LOW, for one-full second, if it has NEVER declared the dBDI defect, during the previous one-second period.
MI_1Second	Input	Management Interface - One Second Clock Input: The user is expected to supply a clock signal, which has a frequency of 1Hz, to this input. The Performance Monitoring portino of the OTUk_TT_Sk function will use this clock signal as its timing reference for tallying and reporting the various one-second Performance Monitoring parameters.
MI_DEGThr	Input	Management Interface - The dDEG BIP-8 Error Threshold for a Bad One-Second Interval: The user can specify the BIP-8 error threshold for which the OTUk_TT_Sk function should count a given one second period as a "Bad One-Second" period, for the sake of dDEG declaration. If the OTUk_TT_Sk function detects DEGThr or more BIP-8 errors, during a one-second interval, then the OTUk_TT_Sk function will count that one-second interval as a "Bad" interval. If the OTUk_TT_Sk function detects less than DEGThr BIP-8 errors, during a one-second interval, then the OTUk_TT_Sk function will NOT count that one-second as a "Bad" interval.
MI_DEGM	Input	Management Interface - Number of "Bad One-Second" Intervals for dDEG Declaration: The user can specify the minimum number of consecutive "Bad One Second" intervals that the OTUk_TT_Sk function must detect before declaring the dDEG defect condition. If the OTUk_TT_Sk function detects and flags DEGM consecutive "Bad One-Second" Intervals, then the OTUk_TT_Sk function will declare the dDEG defect condition. NOTE: DEGThr defines the threshold for a "Bad One-Second" interval.

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What is the OTUk_TT_So Atomic Function?

This blog post briefly defines the OTUk_TT_So (OTUk Trail Termination Source) Atomic Function. One of the roles of this function is to insert the real Section Monitoring Overhead (SMOH) into the OTU Overhead.

What is the OTUk_TT_So Atomic Function?

We formally call the OTUk_TT_So Atomic Function the OTUk Trail Termination Source Function.

Introduction

The OTUk_TT_So function is any function that accepts data from upstream circuitry (usually the OTUk/ODUk_A_So function). It uses the data (within this data stream) along with signals from a collocated OTUk_TT_Sk function to compute/generate and insert the OTUk Section Monitoring Overhead (SMOH) into the OTUk signal.

We have an extensive discussion of the OTUk_TT_So Atomic Function in Lesson 9 within THE BEST DARN OTN TRAINING PRESENTATION…PERIOD!!!

I show how we can connect these atomic functions below in Figure 1.

Figure 1, Drawing of a Bidirectional Network (consisting of various Atomic Functions) with the OTUk/ODUk_A_So, the OTUk_TT_So, and its collocated OTUk_TT_Sk functions highlighted

So What Does this Atomic Function Do?

If you recall, from our discussion of the OTUk/ODUk_A_So function, that function will only generate default values for the OTUk-SMOH within the OTUk signal it transmits. The OTUk/ODUk_A_So function creates this default SMOH as a place-holder for a future (and actual) SMOH.

Computes and Inserts the Real SMOH Values into the Outbound OTUk Frames

Well, the purpose of the OTUk_TT_So function is to calculate and replace these default SMOH values with actual SMOH values.

More specifically, this function will compute and replace the following SMOH fields with actual Overhead data.

SM-BIP-8 field, within the Section Monitoring field
SM-BEI/BIAE nibble field within the Section Monitoring Byte
SM-BDI bit-field within the Section Monitoring Byte
IAE bit-field within the Section Monitoring Byte
SM-TTI (Trail Trace Identification) byte within the Section Monitoring field.

Afterward, the OTUk_TT_So function will transmit this OTUk data stream to either the OTSi/OTUk-a_A_S0 function (for OTU1/2 applications) or the OTSiG/OTUk-a_A_S0 function (for OTU3/4 applications).

These functions will condition the OTUk data stream for transmission over Optical Fiber.

Why Do We Care about the SMOH from the OTUk_TT_So Function?

The SMOH that the OTUk_TT_So function computes and inserts into the OTUk data stream serves as the basis of comparison for the OTUk_TT_Sk function (at the remote Network Element).

The OTUk_TT_Sk function (at the remote end of our OTUk connection) will use this SMOH data to determine:

if it should declare any defect conditions, or
if errors have occurred during transmission between the near-end OTUk_TT_So and the remote OTUk_TT_Sk functions.

I show an illustration where both the OTUk_TT_So and OTUk_TT_Sk functions “fit into the big picture” below in Figure 2.

Figure 2, Drawing of Unidirectional Connection between a Source STE and a Sink STE with the OTUk_TT_So and OTUk_TT_Sk functions highlighted.

Some Details about the OTUk_TT_So Function

Figure 3 presents a drawing of the ITU-T G.798 symbol for the OTUk_TT_So function.

Figure 3, Simple Drawing of the OTUk_TT_So function

The OTUk_TT_So function accepts a basic OTUk data stream from the upstream OTUk/ODUk_A_So function via the OTUk_AP Interface.

The data that is output from the OTUk/ODUk_A_So function includes the Clock Signal (AI_CK), Frame Synchronization Signal (AI_FS), the Multi-Frame Synchronization Signal (AI_MFS), the OTUk data-stream (AI_D) and the IAE (Input Alignment Error) indicator (via the AI_IAE signal).

The OTUk_TT_So function is responsible for accepting data from its various interfaces and then computing and inserting the correct SMOH data into the OTUk data stream.

Figure 2 shows that this function consists of the following four different interfaces.

OTUk_AP
OTUk_CP
OTUk_RP and
OTUk_TT_So_MP

We will discuss each of these interfaces below.

Figure 4 presents a functional block diagram of the OTUk_TT_So function.

Figure 4 Functional Block Diagram of the OTUk_TT_So function

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The OTUk_AP (OTUk Access Point) Interface

Figure 4 shows that the circuitry connected to (and driving) the OTUk_AP Interface (e.g., the OTUk/ODUk_A_So function) will supply the following signals to this interface.

AI_D – Bare-bones OTUk data (with the default SMOH)
AI_CK – The OTUk clock input signal
AI_FS – The OTUk Frame Start Input
AI_MFS – the OTUk Multi-Frame Start Input
AI_IAE – The OTUk Input Alignment Error Indicator Signal

The OTUk_TT_So function will then perform the following operations on these signals.

SM-BIP-8 Computation and Insertion – We discuss BIP-8 Computation and Insertion in another post.
IAE (Indicator) Insertion (into the OTUk-SMOH) – We discuss IAE insertion below in another post. (*)

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Let’s move on to another port within this atomic function.

The OTUk_TT_So_RP (Remote Port) Interface

The OTUk_TT_So function will also accept data via the OTUk_TT_So_RP interface. This interface consists of the following inputs.

RI_BEI – Remote Interface – Backward Error Indicator
RI_BIAE – Remote Interface – Backward Input Alignment Error Indicator
RI_BDI – Remote Interface – Backward Defect Indicator

The OTUk_TT_So function will operate in conjunction with a collocated Near-End OTUk_TT_Sk function and perform the following operations on these signals.

BDI Insertion (into the OTUk-SMOH) – The OTUk_TT_So function will accept the BDI information from the Near-End Collocated OTUk_TT_Sk function via the RI_BDI input and insert this data into the SM-BDI bit-field (within the SMOH) of the very next outbound OTUk frame.
BEI Insertion (into the OTUk-SMOH) – The OTUk_TT_So function will take the BEI information from the Near-End Collocated OTUk_TT_Sk function via the RI_BEI input and insert this data into the SM-BEI/BIAE nibble-field (within SMOH) of the very next outbound OTUk frame.
BIAE Insertion (into the OTUk-SMOH) – The OTUk_TT_So function will accept the BIAE information from the Near-End Collocated OTUk_TT_Sk function via the RI_BIAE input and (if appropriate) will insert this information into the SM-BEI/BIAE nibble-field (within the SMOH) of the very next outbound OTUk frame.

I show a drawing of our OTUk_TT_So function that is electrically connected to its collocated, Near-End OTUk_TT_Sk function via the Remote Port below in Figure 5.

Figure 5, Illustration of our OTUk_TT_So Function, along with its collocated, Near-End OTUk_TT_Sk function

We discuss the operations through the RP Interface in another post.

Next, let’s move on and discuss the Management Port of this atomic function.

The OTUk_TT_So_MP (Management Port) Interface

Finally, the OTUk_TT_So function accepts data from the OTUk_TT_So_MP Interface. This particular interface consists of the following input pin.

MI_TxTI – Trail Trace Identifier Input

The function user is expected to load the contents of the outbound Trail Trace Identifier Message (64 bytes) to this input port.

The OTUk_TT_So function will then take this message data, and it will proceed to use the TTI byte-field within the OTUk-SMOH to transmit the contents of this message, one byte at a time, to the OTUk_TT_Sk function within the remote Network Element, via the OTUk data-stream. Since the TTI Message is 64 bytes long, the OTUk_TT_So function will require 64 OTUk frames to transmit the complete TTI Message.

We will discuss these processes in greater detail in the Trail Trace Identifier post.

How the OTUk_TT_So function sources each of the various Overhead Fields within the SMOH

As we mentioned earlier, the primary responsibility of the OTUk_TT_So function is to compute/source the correct values for multiple fields within the SMOH and insert those values into the SMOH within each outbound OTUk frame.

Table 1 presents a list of Overhead-fields that the OTUk_TT_So function computes and sources. This table also shows where this function gets its data for these Overhead fields.

Table 1, A List of the SMOH Overhead-fields that the OTUk_TT_So function computes/sources and how/where this function gets/derives this data.

Overhead Field	Location within OTUk-SMOH	Source of Data/How Derived?
BIP-8 Byte	BIP-8 Byte within the Section Monitoring Field	The OTUk_TT_So function locally computes the BIP-8 value based upon the contents within the OPUk portion of the OTUk frame.
IAE Bit-Field	The IAE Bit-field within the Section Monitoring Byte	Based upon the AI_IAE input to the function (at the OTUk_AP Interface)
BDI Bit-Field	The BDI bit-field within the Section Monitoring byte	Based upon the RI_BDI input to this function (at the Remote Port Interface).
BEI Nibble-Field	The BEI/BIAE Nibble-field within the Section Monitoring Byte	Based upon the RI_BEI and RI_BIAE inputs to this function (at the Remote Port Interface).
BIAE Nibble-Field	The BEI/BIAE bit-fields within the Section Monitoring byte.	Based upon the RI_BIAE and RI_BEI inputs to this function (at the Remote Port Interface).
TTI Byte-Field	TTI Byte within the Section Monitoring Field.	The user is expected to load in the contents of the 64-byte Trace Identifier Message (TIM) into a buffer via the MI_TxTI input to this function. The function will proceed to transmit the contents of this TIM, one byte at a time, via the TTI byte-field within each outbound OTUk Frame. The OTUk_TT_So function will transport the entire TIM over 64 consecutive OTUk frames.

List of Input and Output Signals for the OTUk_TT_So Atomic Function

Table 2 presents a Pin Description for each of the Input/Output signals of the OTUk_TT_So Atomic Function.

Table 2, Input/Output Pin Description of the OTUk_TT_So Atomic Function

Signal Name	Type	Description
OTUk_AP Interface
AI_D	Input	OTUk Adapted Interface - OTUk Data Input: The function user is expected to apply a bare-bones OTUk signal (which is output from the AI_D output of the OTUk/ODUk_A_So function) to this input pin. NOTE: This OTUk data will contain the following fields - Default OTUk SMOH data, - The contents of the APS/PCC channel and - The rest of the OTUk frame. This OTUk data-stream will not include the FAS, MFAS or FEC field. This function will compute, generate and insert the appropriate OTUk-SMOH into this OTUk data-stream The OTUk_TT_So function will sample this input signal on one of the edges of the AI_CK input clock signal.
AI_CK	Input	OTUk Adapted Interface - Clock Input: The OTUk_TT_So function will sample all data and signals (that the user applies to the OTUk_AP Interface) upon one of the edges of this input clock signal. This statement applies to the following signals: AI_D, AI_FS, AI_MFS and AI_IAE. This clock signal will also function as the timing source for this function as well.
AI_FS	Input	OTUk Adapted Information - Frame Start Input: The upstream OTUk/ODUk_A_So function should pulse this input signal HIGH whenever the OTUk_AP Interface accepts the very first bit (or byte) of a new OTUk frame, via the AI_D inputs. The upstream OTUk/ODUk_A_So function should drive this input HIGH once for each OTUk frame.
AI_MFS	Input	OTUk Adapted Information - Multiframe Start Output: The upstream OTUk/ODUk_A_So function should pulse this input signal HIGH whenever the OTUk_AP interface accepts the very first bit (or byte) of a new OTUk superframe, via the AI_D input. The upstream OTUk/ODUk_A_So function should drive this input HIGH once for each OTUk superframe.
AI_IAE	Input	OTUk Adapted Information - Input Alignment Error Input: the OTUk/ODUk_A_So function (upstream from this function) will drive this input pin HIGH whenever it detects a frame-slip (or IAE event). Anytime the OTUk_TT_So function detects this input pin, going from LOW to HIGH, then it should respond by setting the IAE bit-field to "1" for 16 consecutive Superframes (or 4096 consecutive OTUk frames). Please see the blog on IAE for more information on this feature.
OTUk_CP Interface
CI_D	Output	OTUk Characteristic Information - OTUk Data Output: The OTUk_TT_So function will compute, generate and insert the SMOH (Section Monitoring Overhead) into the outbound OTUk data-stream. It will then output this OTUk data-stream via this output signal. NOTE: This OTUk data will contain the following fields. - The newly computed, inserted BIP-8 value - The newly received and inserted BEI-nibble value or BIAE indicator. - The newly received and inserted BDI bit-value. - the newly received and inserted IAE value. - The contents of the APS/PCC channel and - The rest of the OTUk frame. This OTUk data-stream will not include the FAS, MFAS or FEC field. The OTUk_TT_So function will update this output signal on one of the edges of the CI_CK output clock signal.
CI_CK	Output	OTUk Adapted Information - Clock Output: The OTUk_TT_So function will output all data and signals (via the OTUk_CP interface) upon one of the edges of this output clock signal. This statement applies to the following signals: CI_D, CI_FS and CI_MFS.
CI_FS	Output	OTUk Characteristic Information - Frame Start Output: This function will drive this output pin HIGH whenever the OTUk_CP interface outputs the very first bit (or byte) of a new OTUk frame, via the CI_D output. The OTUk_TT_So function should only pulse this output pin HIGH once for each outbound OTUk frame.
CI_MFS	Output	OTUk Characteristic Information - Multiframe Start Output: This function will drive this output pin HIGH whenever the OTUk _CP Interface outputs the very first bit (or byte) of a new OTUk Superframe via the CI_D. The OTUk_TT_So function will drive this output pin HIGH once for each OTUk Superframe.
OTUk_TT_So_RP Interface
REI_BEI	Input	Remote Port Interface - BEI (Backward Error Indicator) Input: The OTUk_TT_So function will accept one nibble of data (for each outbound OTUk frame) via this input signal and it will insert this data into the BEI/BIAE nibble-field within the Section Monitor field within each outbound OTUk frame. The BEI value will reflect the number of BIP-8 errors that the collocated OTUk_TT_Sk function has detected and flagged within its most recently recevied and verified OTUk frame. NOTE: If the OTUk_TT_So function receives a BIAE = 1 (via the RI_BIAE input) then it will overwrite the BEI/BIAE nibble-field with the value "1011" to denote a BIAE event. Please see the BEI post for more information about Backward Error Indication.
RI_BIAE	Input	Remote Port Interface - BIAE (Backward Input Alignment Error) Input: The OTUk_TT_So function will accept one bit of data (for each outbound OTUk frame) via this input signal and it will do either of the following, depending on the value of this single bit-field. If BIAE = 0 Then the OTUk_TT_So function will write the BEI value that it has received via the RI_BEI input, into the BEI nibble-field within the Section Monitor byte of the next outbound OTUk frame. If BIAE = 1 Then the OTUk_TT_So function will not write the BEI value (that it has received from the collocated OTUk_TT_Sk function). It will instead, write the value "1011" into the BEI/BIAE nibble-field, within the Section Monitor byte of the next outbound OTUk frame.
RI_BDI	Input	Remote Port Interface - Backward Defect Indicator Input: The OTUk_TT_So function will accept one bit of data (for each outbound OTUk frame) via this input pin and it will write the contents of this value into the RDI bit-field (within the Section Monitor byte) of the next outbound OTUk frame. If RI_BDI = 0 The the OTUk_TT_So function will set the BDI bit-field to "0" within the next outbound OTUk frame. If RI_BDI = 1 Then the OTUk_TT_So function will set the BDI-bit-field to "1" within the next outbound OTUk frame.
OTUk_TT_So_MP Interface
MI_TxTI	Input	Management Interface - Trail Trace Identifier Input: The function user is expected to load in the 64-byte TTI Message into the OTUk_TT_So circuitry via this input. The OTUk_TT_So function will then transmit the message to the remote Network Element, one byte-at-a-time, over 64 consecutive outbound OTUk frames.

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For More Information on OTN Posts in this Blog, click on the Image below.

OTN Related Topics within this Blog

OTN Related Topics within this Blog General Topics Consequent Equations - What are they and How can you use them? ...

How an OTN STE should declare and clear the dLOM (Loss of Multi-Frame) Defect Condition.

A Note about Terminology:

A Brief Review of the OTUk Frame Structure

The MFAS Byte Increments with each Frame

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A Basic Requirement before We can Clear the dLOM Defect Condition

The Sink STE needs to find the FAS-field first

The FAS field is FAR more accessible for the Sink STE to find than the MFAS byte.

Finally, the MFAS byte-field was scrambled by a Frame-Synchronous Scrambler (at the remote Source STE)

The dLOM-Related State Machines

The OTUk-MFAS OOM/IM Low-Level State Machine

The LL-OOM State

The LL-IM State

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The OTUk-dLOM Framing Alignment/Maintenance State Machine

The dLOM/LL-OOM State

What does it mean to be in the dLOM/LL-OOM State?

If the New_Candidate_MFAS_Value fails the Test

If the New_Candidate_MFAS_Value passes the Test

The dLOM/LL-IM State

Advancing to the In-Multi-Frame/LL-IM State

Regressing to the dLOM/LL-OOM State

The In-Multi-Frame/LL-IM State

What Does Clearing the dLOM Defect Mean?

The In-Multi-frame/LL-OOM State

Advancing Back into the In-Multi-Frame/LL-IM State

Regressing to the dLOM/LL-OOM State

In Summary

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A Note About Terminology:

A Brief Review of the OTUk Frame Structure

The dLOF-Related State Machines

The OTUk-FAS OOF/IF Low-Level State Machine

The LL-OOF State

ITU-T G.798’s Requirement for Searching for the FAS field

The LL-IF State

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The OTUk-dLOF Framing Alignment/Maintenance State Machine

The dLOF/LL-OOF State

What does it mean to be in the dLOF/LL-OOF State?

If the Sink STE Fails to Find the FAS field

If the Sink STE Successfully Locates the FAS field

The dLOF/LL-IF State

Advancing to the In-Frame/LL-IF State

Regressing to the dLOF/LL-OOF State

The In-Frame/LL-IF State

The In-Frame/LL-OOF State

Advancing Back into the In-Frame/LL-IF State

Regressing to the dLOF/LL-OOF State

In Summary

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How Should an OTN STE Declare and Clear the dAIS Defect Condition (OTUk-AIS)?

What about this Post?

How to Detect the PN-11 Pattern?

How Does this Inverse PN-11 Circuit Work?

OTUk-AIS Maintenance Signal or All-Zeros Pattern Signal at the IN input?

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Criteria for Declaring the dAIS Defect?

Criteria for Clearing the dAIS Defect Condition

What Entities or Atomic Functions declare and clear the dAIS (OTUk-AIS) defect condition?

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Changes in Terminology

What is an OTSiG?

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Some More Information about Multi-Lane Interfaces for OTU3 and OTU4 Applications

The OTSiG/OTUk_A_Sk Function

Versions of the OTSiG/OTUk_A_Sk Function

How an OTN STE should declare and clear the dLOF (Loss of Frame) Defect Condition

What is the OTSiG/OTUk_A_Sk Atomic Function?